xref: /freebsd/sys/contrib/device-tree/Bindings/thermal/mediatek-thermal.txt (revision 43a5ec4eb41567cc92586503212743d89686d78f)
1* Mediatek Thermal
2
3This describes the device tree binding for the Mediatek thermal controller
4which measures the on-SoC temperatures. This device does not have its own ADC,
5instead it directly controls the AUXADC via AHB bus accesses. For this reason
6this device needs phandles to the AUXADC. Also it controls a mux in the
7apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
8is also needed.
9
10Required properties:
11- compatible:
12  - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
13  - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
14  - "mediatek,mt2712-thermal" : For MT2712 family of SoCs
15  - "mediatek,mt7622-thermal" : For MT7622 SoC
16  - "mediatek,mt8183-thermal" : For MT8183 family of SoCs
17  - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 family of SoCs
18- reg: Address range of the thermal controller
19- interrupts: IRQ for the thermal controller
20- clocks, clock-names: Clocks needed for the thermal controller. required
21                       clocks are:
22		       "therm":	 Main clock needed for register access
23		       "auxadc": The AUXADC clock
24- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
25- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
26- #thermal-sensor-cells : Should be 0. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description.
27
28Optional properties:
29- resets: Reference to the reset controller controlling the thermal controller.
30- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
31               unspecified default values shall be used.
32- nvmem-cell-names: Should be "calibration-data"
33
34Example:
35
36	thermal: thermal@1100b000 {
37		#thermal-sensor-cells = <1>;
38		compatible = "mediatek,mt8173-thermal";
39		reg = <0 0x1100b000 0 0x1000>;
40		interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
41		clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
42		clock-names = "therm", "auxadc";
43		resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
44		reset-names = "therm";
45		mediatek,auxadc = <&auxadc>;
46		mediatek,apmixedsys = <&apmixedsys>;
47		nvmem-cells = <&thermal_calibration_data>;
48		nvmem-cell-names = "calibration-data";
49	};
50