1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/thermal/mediatek,thermal.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Mediatek thermal controller for on-SoC temperatures 8 9maintainers: 10 - Sascha Hauer <s.hauer@pengutronix.de> 11 12description: 13 This device does not have its own ADC, instead it directly controls the AUXADC 14 via AHB bus accesses. For this reason it needs phandles to the AUXADC. Also it 15 controls a mux in the apmixedsys register space via AHB bus accesses, so a 16 phandle to the APMIXEDSYS is also needed. 17 18allOf: 19 - $ref: thermal-sensor.yaml# 20 21properties: 22 compatible: 23 oneOf: 24 - enum: 25 - mediatek,mt2701-thermal 26 - mediatek,mt2712-thermal 27 - mediatek,mt7622-thermal 28 - mediatek,mt7986-thermal 29 - mediatek,mt8173-thermal 30 - mediatek,mt8183-thermal 31 - mediatek,mt8365-thermal 32 - items: 33 - enum: 34 - mediatek,mt8516-thermal 35 - const: mediatek,mt2701-thermal 36 - items: 37 - enum: 38 - mediatek,mt7981-thermal 39 - const: mediatek,mt7986-thermal 40 41 reg: 42 maxItems: 1 43 44 interrupts: 45 maxItems: 1 46 47 clocks: 48 items: 49 - description: Main clock needed for register access 50 - description: The AUXADC clock 51 52 clock-names: 53 items: 54 - const: therm 55 - const: auxadc 56 57 mediatek,auxadc: 58 $ref: /schemas/types.yaml#/definitions/phandle 59 description: A phandle to the AUXADC which the thermal controller uses 60 61 mediatek,apmixedsys: 62 $ref: /schemas/types.yaml#/definitions/phandle 63 description: A phandle to the APMIXEDSYS controller 64 65 resets: 66 description: Reset controller controlling the thermal controller 67 68 nvmem-cells: 69 items: 70 - description: 71 NVMEM cell with EEPROMA phandle to the calibration data provided by an 72 NVMEM device. If unspecified default values shall be used. 73 74 nvmem-cell-names: 75 items: 76 - const: calibration-data 77 78required: 79 - reg 80 - interrupts 81 - clocks 82 - clock-names 83 - mediatek,auxadc 84 - mediatek,apmixedsys 85 86unevaluatedProperties: false 87 88examples: 89 - | 90 #include <dt-bindings/interrupt-controller/irq.h> 91 #include <dt-bindings/clock/mt8173-clk.h> 92 #include <dt-bindings/reset/mt8173-resets.h> 93 94 thermal@1100b000 { 95 compatible = "mediatek,mt8173-thermal"; 96 reg = <0x1100b000 0x1000>; 97 interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; 98 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; 99 clock-names = "therm", "auxadc"; 100 resets = <&pericfg MT8173_PERI_THERM_SW_RST>; 101 mediatek,auxadc = <&auxadc>; 102 mediatek,apmixedsys = <&apmixedsys>; 103 nvmem-cells = <&thermal_calibration_data>; 104 nvmem-cell-names = "calibration-data"; 105 #thermal-sensor-cells = <1>; 106 }; 107