1*c66ec88fSEmmanuel Vadot* Socionext Synquacer HS-SPI bindings 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired Properties: 4*c66ec88fSEmmanuel Vadot- compatible: should be "socionext,synquacer-spi" 5*c66ec88fSEmmanuel Vadot- reg: physical base address of the controller and length of memory mapped 6*c66ec88fSEmmanuel Vadot region. 7*c66ec88fSEmmanuel Vadot- interrupts: should contain the "spi_rx", "spi_tx" and "spi_fault" interrupts. 8*c66ec88fSEmmanuel Vadot- clocks: core clock iHCLK. Optional rate clock iPCLK (default is iHCLK) 9*c66ec88fSEmmanuel Vadot- clock-names: Shall be "iHCLK" and "iPCLK" respectively 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel VadotOptional Properties: 12*c66ec88fSEmmanuel Vadot- socionext,use-rtm: boolean, if required to use "retimed clock" for RX 13*c66ec88fSEmmanuel Vadot- socionext,set-aces: boolean, if same active clock edges field to be set. 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel VadotExample: 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel Vadot spi0: spi@ff110000 { 18*c66ec88fSEmmanuel Vadot compatible = "socionext,synquacer-spi"; 19*c66ec88fSEmmanuel Vadot reg = <0xff110000 0x1000>; 20*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, 21*c66ec88fSEmmanuel Vadot <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 22*c66ec88fSEmmanuel Vadot <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 23*c66ec88fSEmmanuel Vadot clocks = <&clk_hsspi>; 24*c66ec88fSEmmanuel Vadot clock-names = "iHCLK"; 25*c66ec88fSEmmanuel Vadot socionext,use-rtm; 26*c66ec88fSEmmanuel Vadot socionext,set-aces; 27*c66ec88fSEmmanuel Vadot }; 28