1* Serial NOR flash controller for MediaTek ARM SoCs 2 3Required properties: 4- compatible: For mt8173, compatible should be "mediatek,mt8173-nor", 5 and it's the fallback compatible for other Soc. 6 For every other SoC, should contain both the SoC-specific compatible 7 string and "mediatek,mt8173-nor". 8 The possible values are: 9 "mediatek,mt2701-nor", "mediatek,mt8173-nor" 10 "mediatek,mt2712-nor", "mediatek,mt8173-nor" 11 "mediatek,mt7622-nor", "mediatek,mt8173-nor" 12 "mediatek,mt7623-nor", "mediatek,mt8173-nor" 13 "mediatek,mt7629-nor", "mediatek,mt8173-nor" 14 "mediatek,mt8173-nor" 15- reg: physical base address and length of the controller's register 16- interrupts: Interrupt number used by the controller. 17- clocks: the phandle of the clocks needed by the nor controller 18- clock-names: the names of the clocks 19 the clocks should be named "spi" and "sf". "spi" is used for spi bus, 20 and "sf" is used for controller, these are the clocks witch 21 hardware needs to enabling nor flash and nor flash controller. 22 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. 23- #address-cells: should be <1> 24- #size-cells: should be <0> 25 26There should be only one spi slave device following generic spi bindings. 27It's not recommended to use this controller for devices other than SPI NOR 28flash due to limited transfer capability of this controller. 29 30Example: 31 32nor_flash: spi@1100d000 { 33 compatible = "mediatek,mt8173-nor"; 34 reg = <0 0x1100d000 0 0xe0>; 35 interrupts = <&spi_flash_irq>; 36 clocks = <&pericfg CLK_PERI_SPI>, 37 <&topckgen CLK_TOP_SPINFI_IFR_SEL>; 38 clock-names = "spi", "sf"; 39 #address-cells = <1>; 40 #size-cells = <0>; 41 42 flash@0 { 43 compatible = "jedec,spi-nor"; 44 reg = <0>; 45 }; 46}; 47 48