xref: /freebsd/sys/contrib/device-tree/Bindings/spi/spi-fsl-lpspi.yaml (revision 7ef62cebc2f965b0f640263e179276928885e33d) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Low Power SPI (LPSPI) for i.MX
8
9maintainers:
10  - Anson Huang <Anson.Huang@nxp.com>
11
12allOf:
13  - $ref: "/schemas/spi/spi-controller.yaml#"
14
15properties:
16  compatible:
17    oneOf:
18      - enum:
19          - fsl,imx7ulp-spi
20          - fsl,imx8qxp-spi
21      - items:
22          - enum:
23              - fsl,imx8ulp-spi
24              - fsl,imx93-spi
25          - const: fsl,imx7ulp-spi
26  reg:
27    maxItems: 1
28
29  interrupts:
30    maxItems: 1
31
32  clocks:
33    items:
34      - description: SoC SPI per clock
35      - description: SoC SPI ipg clock
36
37  clock-names:
38    items:
39      - const: per
40      - const: ipg
41
42  dmas:
43    items:
44      - description: TX DMA Channel
45      - description: RX DMA Channel
46
47  dma-names:
48    items:
49      - const: tx
50      - const: rx
51
52  fsl,spi-only-use-cs1-sel:
53    description:
54      spi common code does not support use of CS signals discontinuously.
55      i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
56      this property to re-config the chipselect value in the LPSPI driver.
57    type: boolean
58
59required:
60  - compatible
61  - reg
62  - interrupts
63  - clocks
64  - clock-names
65
66unevaluatedProperties: false
67
68examples:
69  - |
70    #include <dt-bindings/clock/imx7ulp-clock.h>
71    #include <dt-bindings/interrupt-controller/arm-gic.h>
72
73    spi@40290000 {
74        compatible = "fsl,imx7ulp-spi";
75        reg = <0x40290000 0x10000>;
76        interrupt-parent = <&intc>;
77        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
78        clocks = <&clks IMX7ULP_CLK_LPSPI2>,
79                 <&clks IMX7ULP_CLK_DUMMY>;
80        clock-names = "per", "ipg";
81        spi-slave;
82        fsl,spi-only-use-cs1-sel;
83    };
84