1*c66ec88fSEmmanuel VadotARM Freescale DSPI controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible : must be one of: 5*c66ec88fSEmmanuel Vadot "fsl,vf610-dspi", 6*c66ec88fSEmmanuel Vadot "fsl,ls1021a-v1.0-dspi", 7*c66ec88fSEmmanuel Vadot "fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), 8*c66ec88fSEmmanuel Vadot "fsl,ls1028a-dspi", 9*c66ec88fSEmmanuel Vadot "fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), 10*c66ec88fSEmmanuel Vadot "fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), 11*c66ec88fSEmmanuel Vadot "fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), 12*c66ec88fSEmmanuel Vadot "fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"), 13*c66ec88fSEmmanuel Vadot "fsl,ls2085a-dspi", 14*c66ec88fSEmmanuel Vadot "fsl,lx2160a-dspi", 15*c66ec88fSEmmanuel Vadot- reg : Offset and length of the register set for the device 16*c66ec88fSEmmanuel Vadot- interrupts : Should contain SPI controller interrupt 17*c66ec88fSEmmanuel Vadot- clocks: from common clock binding: handle to dspi clock. 18*c66ec88fSEmmanuel Vadot- clock-names: from common clock binding: Shall be "dspi". 19*c66ec88fSEmmanuel Vadot- pinctrl-0: pin control group to be used for this controller. 20*c66ec88fSEmmanuel Vadot- pinctrl-names: must contain a "default" entry. 21*c66ec88fSEmmanuel Vadot- spi-num-chipselects : the number of the chipselect signals. 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel VadotOptional property: 24*c66ec88fSEmmanuel Vadot- big-endian: If present the dspi device's registers are implemented 25*c66ec88fSEmmanuel Vadot in big endian mode. 26*c66ec88fSEmmanuel Vadot- bus-num : the slave chip chipselect signal number. 27*c66ec88fSEmmanuel Vadot 28*c66ec88fSEmmanuel VadotOptional SPI slave node properties: 29*c66ec88fSEmmanuel Vadot- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip 30*c66ec88fSEmmanuel Vadot select and the start of clock signal, at the start of a transfer. 31*c66ec88fSEmmanuel Vadot- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock 32*c66ec88fSEmmanuel Vadot signal and deactivating chip select, at the end of a transfer. 33*c66ec88fSEmmanuel Vadot 34*c66ec88fSEmmanuel VadotExample: 35*c66ec88fSEmmanuel Vadot 36*c66ec88fSEmmanuel Vadotdspi0@4002c000 { 37*c66ec88fSEmmanuel Vadot #address-cells = <1>; 38*c66ec88fSEmmanuel Vadot #size-cells = <0>; 39*c66ec88fSEmmanuel Vadot compatible = "fsl,vf610-dspi"; 40*c66ec88fSEmmanuel Vadot reg = <0x4002c000 0x1000>; 41*c66ec88fSEmmanuel Vadot interrupts = <0 67 0x04>; 42*c66ec88fSEmmanuel Vadot clocks = <&clks VF610_CLK_DSPI0>; 43*c66ec88fSEmmanuel Vadot clock-names = "dspi"; 44*c66ec88fSEmmanuel Vadot spi-num-chipselects = <5>; 45*c66ec88fSEmmanuel Vadot bus-num = <0>; 46*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 47*c66ec88fSEmmanuel Vadot pinctrl-0 = <&pinctrl_dspi0_1>; 48*c66ec88fSEmmanuel Vadot big-endian; 49*c66ec88fSEmmanuel Vadot 50*c66ec88fSEmmanuel Vadot sflash: at26df081a@0 { 51*c66ec88fSEmmanuel Vadot #address-cells = <1>; 52*c66ec88fSEmmanuel Vadot #size-cells = <1>; 53*c66ec88fSEmmanuel Vadot compatible = "atmel,at26df081a"; 54*c66ec88fSEmmanuel Vadot spi-max-frequency = <16000000>; 55*c66ec88fSEmmanuel Vadot spi-cpol; 56*c66ec88fSEmmanuel Vadot spi-cpha; 57*c66ec88fSEmmanuel Vadot reg = <0>; 58*c66ec88fSEmmanuel Vadot linux,modalias = "m25p80"; 59*c66ec88fSEmmanuel Vadot modal = "at26df081a"; 60*c66ec88fSEmmanuel Vadot fsl,spi-cs-sck-delay = <100>; 61*c66ec88fSEmmanuel Vadot fsl,spi-sck-cs-delay = <50>; 62*c66ec88fSEmmanuel Vadot }; 63*c66ec88fSEmmanuel Vadot}; 64*c66ec88fSEmmanuel Vadot 65*c66ec88fSEmmanuel Vadot 66