xref: /freebsd/sys/contrib/device-tree/Bindings/spi/samsung,spi.yaml (revision bdd1243df58e60e85101c09001d9812a789b6bc4) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/samsung,spi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S3C/S5P/Exynos SoC SPI controller
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11
12description:
13  All the SPI controller nodes should be represented in the aliases node using
14  the following format 'spi{n}' where n is a unique number for the alias.
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450
21          - samsung,s3c6410-spi
22          - samsung,s5pv210-spi # for S5PV210 and S5PC110
23          - samsung,exynos4210-spi
24          - samsung,exynos5433-spi
25          - samsung,exynosautov9-spi
26          - tesla,fsd-spi
27      - const: samsung,exynos7-spi
28        deprecated: true
29
30  clocks:
31    minItems: 2
32    maxItems: 3
33
34  clock-names:
35    minItems: 2
36    maxItems: 3
37
38  cs-gpios: true
39
40  dmas:
41    minItems: 2
42    maxItems: 2
43
44  dma-names:
45    items:
46      - const: tx
47      - const: rx
48
49  interrupts:
50    maxItems: 1
51
52  no-cs-readback:
53    description:
54      The CS line is disconnected, therefore the device should not operate
55      based on CS signalling.
56    type: boolean
57
58  num-cs:
59    minimum: 1
60    maximum: 4
61    default: 1
62
63  samsung,spi-src-clk:
64    description:
65      If the spi controller includes a internal clock mux to select the clock
66      source for the spi bus clock, this property can be used to indicate the
67      clock to be used for driving the spi bus clock. If not specified, the
68      clock number 0 is used as default.
69    $ref: /schemas/types.yaml#/definitions/uint32
70    default: 0
71
72  reg:
73    maxItems: 1
74
75required:
76  - compatible
77  - clocks
78  - clock-names
79  - dmas
80  - dma-names
81  - interrupts
82  - reg
83
84allOf:
85  - $ref: spi-controller.yaml#
86  - if:
87      properties:
88        compatible:
89          contains:
90            enum:
91              - samsung,exynos5433-spi
92              - samsung,exynosautov9-spi
93    then:
94      properties:
95        clocks:
96          minItems: 3
97          maxItems: 3
98        clock-names:
99          items:
100            - const: spi
101            - enum:
102                - spi_busclk0
103                - spi_busclk1
104                - spi_busclk2
105                - spi_busclk3
106            - const: spi_ioclk
107    else:
108      properties:
109        clocks:
110          minItems: 2
111          maxItems: 2
112        clock-names:
113          items:
114            - const: spi
115            - enum:
116                - spi_busclk0
117                - spi_busclk1
118                - spi_busclk2
119                - spi_busclk3
120
121unevaluatedProperties: false
122
123examples:
124  - |
125    #include <dt-bindings/clock/exynos5433.h>
126    #include <dt-bindings/clock/samsung,s2mps11.h>
127    #include <dt-bindings/interrupt-controller/arm-gic.h>
128    #include <dt-bindings/gpio/gpio.h>
129
130    spi@14d30000 {
131        compatible = "samsung,exynos5433-spi";
132        reg = <0x14d30000 0x100>;
133        interrupts = <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>;
134        dmas = <&pdma0 11>, <&pdma0 10>;
135        dma-names = "tx", "rx";
136        #address-cells = <1>;
137        #size-cells = <0>;
138        clocks = <&cmu_peric CLK_PCLK_SPI1>,
139                 <&cmu_peric CLK_SCLK_SPI1>,
140                 <&cmu_peric CLK_SCLK_IOCLK_SPI1>;
141        clock-names = "spi",
142                      "spi_busclk0",
143                      "spi_ioclk";
144        samsung,spi-src-clk = <0>;
145        pinctrl-names = "default";
146        pinctrl-0 = <&spi1_bus>;
147        num-cs = <1>;
148
149        cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
150
151        audio-codec@0 {
152            compatible = "wlf,wm5110";
153            reg = <0x0>;
154            spi-max-frequency = <20000000>;
155            interrupt-parent = <&gpa0>;
156            interrupts = <4 IRQ_TYPE_NONE>;
157            clocks = <&pmu_system_controller 0>,
158                     <&s2mps13_osc S2MPS11_CLK_BT>;
159            clock-names = "mclk1", "mclk2";
160
161            gpio-controller;
162            #gpio-cells = <2>;
163            interrupt-controller;
164            #interrupt-cells = <2>;
165
166            wlf,micd-detect-debounce = <300>;
167            wlf,micd-bias-start-time = <0x1>;
168            wlf,micd-rate = <0x7>;
169            wlf,micd-dbtime = <0x2>;
170            wlf,micd-force-micbias;
171            wlf,micd-configs = <0x0 1 0>;
172            wlf,hpdet-channel = <1>;
173            wlf,gpsw = <0x1>;
174            wlf,inmode = <2 0 2 0>;
175
176            wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
177            wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
178
179            /* core supplies */
180            AVDD-supply = <&ldo18_reg>;
181            DBVDD1-supply = <&ldo18_reg>;
182            CPVDD-supply = <&ldo18_reg>;
183            DBVDD2-supply = <&ldo18_reg>;
184            DBVDD3-supply = <&ldo18_reg>;
185            SPKVDDL-supply = <&ldo18_reg>;
186            SPKVDDR-supply = <&ldo18_reg>;
187
188            controller-data {
189                samsung,spi-feedback-delay = <0>;
190            };
191        };
192    };
193