xref: /freebsd/sys/contrib/device-tree/Bindings/spi/nvidia,tegra210-quad.yaml (revision ec0ea6efa1ad229d75c394c1a9b9cac33af2b1d3) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Tegra Quad SPI Controller
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Jonathan Hunter <jonathanh@nvidia.com>
12
13allOf:
14  - $ref: "spi-controller.yaml#"
15
16properties:
17  compatible:
18    enum:
19      - nvidia,tegra210-qspi
20      - nvidia,tegra186-qspi
21      - nvidia,tegra194-qspi
22
23  reg:
24    maxItems: 1
25
26  interrupts:
27    maxItems: 1
28
29  clock-names:
30    items:
31      - const: qspi
32      - const: qspi_out
33
34  clocks:
35    maxItems: 2
36
37  resets:
38    maxItems: 1
39
40  dmas:
41    maxItems: 2
42
43  dma-names:
44    items:
45      - const: rx
46      - const: tx
47
48patternProperties:
49  "@[0-9a-f]+":
50    type: object
51
52    properties:
53      spi-rx-bus-width:
54        enum: [1, 2, 4]
55
56      spi-tx-bus-width:
57        enum: [1, 2, 4]
58
59      nvidia,tx-clk-tap-delay:
60        description:
61          Delays the clock going out to device with this tap value.
62          Tap value varies based on platform design trace lengths from Tegra
63          QSPI to corresponding slave device.
64        $ref: /schemas/types.yaml#/definitions/uint32
65        minimum: 0
66        maximum: 31
67
68      nvidia,rx-clk-tap-delay:
69        description:
70          Delays the clock coming in from the device with this tap value.
71          Tap value varies based on platform design trace lengths from Tegra
72          QSPI to corresponding slave device.
73        $ref: /schemas/types.yaml#/definitions/uint32
74        minimum: 0
75        maximum: 255
76
77    required:
78      - reg
79
80required:
81  - compatible
82  - reg
83  - interrupts
84  - clock-names
85  - clocks
86  - resets
87
88unevaluatedProperties: false
89
90examples:
91  - |
92    #include <dt-bindings/clock/tegra210-car.h>
93    #include <dt-bindings/reset/tegra210-car.h>
94    #include <dt-bindings/interrupt-controller/arm-gic.h>
95    spi@70410000 {
96            compatible = "nvidia,tegra210-qspi";
97            reg = <0x70410000 0x1000>;
98            interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
99            #address-cells = <1>;
100            #size-cells = <0>;
101            clocks = <&tegra_car TEGRA210_CLK_QSPI>,
102                     <&tegra_car TEGRA210_CLK_QSPI_PM>;
103            clock-names = "qspi", "qspi_out";
104            resets = <&tegra_car 211>;
105            dmas = <&apbdma 5>, <&apbdma 5>;
106            dma-names = "rx", "tx";
107
108            flash@0 {
109                    compatible = "spi-nor";
110                    reg = <0>;
111                    spi-max-frequency = <104000000>;
112                    spi-tx-bus-width = <2>;
113                    spi-rx-bus-width = <2>;
114                    nvidia,tx-clk-tap-delay = <0>;
115                    nvidia,rx-clk-tap-delay = <0>;
116            };
117    };
118