1*c66ec88fSEmmanuel VadotZTE ZX296702 SPDIF controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot - compatible : Must be "zte,zx296702-spdif" 5*c66ec88fSEmmanuel Vadot - reg : Must contain SPDIF core's registers location and length 6*c66ec88fSEmmanuel Vadot - clocks : Pairs of phandle and specifier referencing the controller's clocks. 7*c66ec88fSEmmanuel Vadot - clock-names: "tx" for the clock to the SPDIF interface. 8*c66ec88fSEmmanuel Vadot - dmas: Pairs of phandle and specifier for the DMA channel that is used by 9*c66ec88fSEmmanuel Vadot the core. The core expects one dma channel for transmit. 10*c66ec88fSEmmanuel Vadot - dma-names : Must be "tx" 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel VadotFor more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties 13*c66ec88fSEmmanuel Vadotplease check: 14*c66ec88fSEmmanuel Vadot * resource-names.txt 15*c66ec88fSEmmanuel Vadot * clock/clock-bindings.txt 16*c66ec88fSEmmanuel Vadot * dma/dma.txt 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel VadotExample: 19*c66ec88fSEmmanuel Vadot spdif0: spdif0@b004000 { 20*c66ec88fSEmmanuel Vadot compatible = "zte,zx296702-spdif"; 21*c66ec88fSEmmanuel Vadot reg = <0x0b004000 0x1000>; 22*c66ec88fSEmmanuel Vadot clocks = <&lsp0clk ZX296702_SPDIF0_DIV>; 23*c66ec88fSEmmanuel Vadot clock-names = "tx"; 24*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 25*c66ec88fSEmmanuel Vadot dmas = <&dma 4>; 26*c66ec88fSEmmanuel Vadot dma-names = "tx"; 27*c66ec88fSEmmanuel Vadot }; 28