1Device-Tree bindings for Xilinx PL audio formatter 2 3The IP core supports DMA, data formatting(AES<->PCM conversion) 4of audio samples. 5 6Required properties: 7 - compatible: "xlnx,audio-formatter-1.0" 8 - interrupt-names: Names specified to list of interrupts in same 9 order mentioned under "interrupts". 10 List of supported interrupt names are: 11 "irq_mm2s" : interrupt from MM2S block 12 "irq_s2mm" : interrupt from S2MM block 13 - interrupts-parent: Phandle for interrupt controller. 14 - interrupts: List of Interrupt numbers. 15 - reg: Base address and size of the IP core instance. 16 - clock-names: List of input clocks. 17 Required elements: "s_axi_lite_aclk", "aud_mclk" 18 - clocks: Input clock specifier. Refer to common clock bindings. 19 20Example: 21 audio_ss_0_audio_formatter_0: audio_formatter@80010000 { 22 compatible = "xlnx,audio-formatter-1.0"; 23 interrupt-names = "irq_mm2s", "irq_s2mm"; 24 interrupt-parent = <&gic>; 25 interrupts = <0 104 4>, <0 105 4>; 26 reg = <0x0 0x80010000 0x0 0x1000>; 27 clock-names = "s_axi_lite_aclk", "aud_mclk"; 28 clocks = <&clk 71>, <&clk_wiz_1 0>; 29 }; 30