xref: /freebsd/sys/contrib/device-tree/Bindings/sound/rockchip,i2s-tdm.yaml (revision 8bab661a3316d8bd9b9fbd11a3b4371b91507bd2) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip I2S/TDM Controller
8
9description:
10  The Rockchip I2S/TDM Controller is a Time Division Multiplexed
11  audio interface found in various Rockchip SoCs, allowing up
12  to 8 channels of audio over a serial interface.
13
14maintainers:
15  - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
16
17allOf:
18  - $ref: dai-common.yaml#
19
20properties:
21  compatible:
22    enum:
23      - rockchip,px30-i2s-tdm
24      - rockchip,rk1808-i2s-tdm
25      - rockchip,rk3308-i2s-tdm
26      - rockchip,rk3568-i2s-tdm
27      - rockchip,rk3588-i2s-tdm
28      - rockchip,rv1126-i2s-tdm
29
30  reg:
31    maxItems: 1
32
33  interrupts:
34    maxItems: 1
35
36  dmas:
37    minItems: 1
38    maxItems: 2
39
40  dma-names:
41    minItems: 1
42    maxItems: 2
43    items:
44      enum:
45        - rx
46        - tx
47
48  clocks:
49    minItems: 3
50    items:
51      - description: clock for TX
52      - description: clock for RX
53      - description: AHB clock driving the interface
54      - description:
55          Parent clock for mclk_tx (only required when using mclk-calibrate)
56      - description:
57          Parent clock for mclk_rx (only required when using mclk-calibrate)
58      - description:
59          Clock for sample rates that are an integer multiple of 8000
60          (only required when using mclk-calibrate)
61      - description:
62          Clock for sample rates that are an integer multiple of 11025
63          (only required when using mclk-calibrate)
64
65  clock-names:
66    minItems: 3
67    items:
68      - const: mclk_tx
69      - const: mclk_rx
70      - const: hclk
71      - const: mclk_tx_src
72      - const: mclk_rx_src
73      - const: mclk_root0
74      - const: mclk_root1
75
76  resets:
77    minItems: 1
78    maxItems: 2
79    description: resets for the tx and rx directions
80
81  reset-names:
82    minItems: 1
83    maxItems: 2
84    items:
85      enum:
86        - tx-m
87        - rx-m
88
89  rockchip,grf:
90    $ref: /schemas/types.yaml#/definitions/phandle
91    description:
92      The phandle of the syscon node for the GRF register.
93
94  rockchip,trcm-sync-tx-only:
95    type: boolean
96    description: Use TX BCLK/LRCK for both TX and RX.
97
98  rockchip,trcm-sync-rx-only:
99    type: boolean
100    description: Use RX BCLK/LRCK for both TX and RX.
101
102  "#sound-dai-cells":
103    const: 0
104
105  rockchip,i2s-rx-route:
106    $ref: /schemas/types.yaml#/definitions/uint32-array
107    description:
108      Defines the mapping of I2S RX sdis to I2S data bus lines.
109      By default, they are mapped one-to-one.
110      rockchip,i2s-rx-route = <3> would mean sdi3 is receiving from data0.
111    maxItems: 4
112    items:
113      enum: [0, 1, 2, 3]
114
115  rockchip,i2s-tx-route:
116    $ref: /schemas/types.yaml#/definitions/uint32-array
117    description:
118      Defines the mapping of I2S TX sdos to I2S data bus lines.
119      By default, they are mapped one-to-one.
120      rockchip,i2s-tx-route = <3> would mean sdo3 is sending to data0.
121    maxItems: 4
122    items:
123      enum: [0, 1, 2, 3]
124
125  rockchip,io-multiplex:
126    description:
127      Specify that the GPIO lines on the I2S bus are multiplexed such that
128      the direction (input/output) needs to be dynamically adjusted.
129    type: boolean
130
131
132required:
133  - compatible
134  - reg
135  - interrupts
136  - dmas
137  - dma-names
138  - clocks
139  - clock-names
140  - resets
141  - reset-names
142  - "#sound-dai-cells"
143
144unevaluatedProperties: false
145
146examples:
147  - |
148    #include <dt-bindings/clock/rk3568-cru.h>
149    #include <dt-bindings/interrupt-controller/arm-gic.h>
150    #include <dt-bindings/interrupt-controller/irq.h>
151    #include <dt-bindings/pinctrl/rockchip.h>
152
153    bus {
154        #address-cells = <2>;
155        #size-cells = <2>;
156        i2s@fe410000 {
157            compatible = "rockchip,rk3568-i2s-tdm";
158            reg = <0x0 0xfe410000 0x0 0x1000>;
159            interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
160            clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>,
161                     <&cru HCLK_I2S1_8CH>;
162            clock-names = "mclk_tx", "mclk_rx", "hclk";
163            dmas = <&dmac1 3>, <&dmac1 2>;
164            dma-names = "rx", "tx";
165            resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
166            reset-names = "tx-m", "rx-m";
167            rockchip,trcm-sync-tx-only;
168            rockchip,grf = <&grf>;
169            #sound-dai-cells = <0>;
170            pinctrl-names = "default";
171            pinctrl-0 =
172                <&i2s1m0_sclktx
173                &i2s1m0_sclkrx
174                &i2s1m0_lrcktx
175                &i2s1m0_lrckrx
176                &i2s1m0_sdi0
177                &i2s1m0_sdi1
178                &i2s1m0_sdi2
179                &i2s1m0_sdi3
180                &i2s1m0_sdo0
181                &i2s1m0_sdo1
182                &i2s1m0_sdo2
183                &i2s1m0_sdo3>;
184        };
185    };
186