xref: /freebsd/sys/contrib/device-tree/Bindings/sound/qcom,lpass-va-macro.yaml (revision af23369a6deaaeb612ab266eb88b8bb8d560c322)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/qcom,lpass-va-macro.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: LPASS(Low Power Audio Subsystem) VA Macro audio codec DT bindings
8
9maintainers:
10  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12properties:
13  compatible:
14    enum:
15      - qcom,sc7280-lpass-va-macro
16      - qcom,sm8250-lpass-va-macro
17
18  reg:
19    maxItems: 1
20
21  "#sound-dai-cells":
22    const: 1
23
24  '#clock-cells':
25    const: 0
26
27  clocks:
28    maxItems: 3
29
30  clock-names:
31    oneOf:
32      - items:   #for ADSP based platforms
33          - const: mclk
34          - const: core
35          - const: dcodec
36      - items:   #for ADSP bypass based platforms
37          - const: mclk
38
39  clock-output-names:
40    items:
41      - const: fsgen
42
43  power-domains:
44    maxItems: 2
45
46  power-domain-names:
47    items:
48      - const: macro
49      - const: dcodec
50
51  qcom,dmic-sample-rate:
52    description: dmic sample rate
53    $ref: /schemas/types.yaml#/definitions/uint32
54
55  vdd-micb-supply:
56    description: phandle to voltage regulator of MIC Bias
57
58required:
59  - compatible
60  - reg
61  - "#sound-dai-cells"
62
63additionalProperties: false
64
65examples:
66  - |
67    #include <dt-bindings/sound/qcom,q6afe.h>
68    codec@3370000 {
69      compatible = "qcom,sm8250-lpass-va-macro";
70      reg = <0x3370000 0x1000>;
71      #sound-dai-cells = <1>;
72      #clock-cells = <0>;
73      clocks = <&aoncc 0>,
74               <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
75               <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
76      clock-names = "mclk", "core", "dcodec";
77      clock-output-names = "fsgen";
78      qcom,dmic-sample-rate = <600000>;
79      vdd-micb-supply = <&vreg_s4a_1p8>;
80    };
81