1* Qualcomm Technologies LPASS CPU DAI 2 3This node models the Qualcomm Technologies Low-Power Audio SubSystem (LPASS). 4 5Required properties: 6 7- compatible : "qcom,lpass-cpu" or "qcom,apq8016-lpass-cpu" 8- clocks : Must contain an entry for each entry in clock-names. 9- clock-names : A list which must include the following entries: 10 * "ahbix-clk" 11 * "mi2s-osr-clk" 12 * "mi2s-bit-clk" 13 : required clocks for "qcom,lpass-cpu-apq8016" 14 * "ahbix-clk" 15 * "mi2s-bit-clk0" 16 * "mi2s-bit-clk1" 17 * "mi2s-bit-clk2" 18 * "mi2s-bit-clk3" 19 * "pcnoc-mport-clk" 20 * "pcnoc-sway-clk" 21 22- interrupts : Must contain an entry for each entry in 23 interrupt-names. 24- interrupt-names : A list which must include the following entries: 25 * "lpass-irq-lpaif" 26- pinctrl-N : One property must exist for each entry in 27 pinctrl-names. See ../pinctrl/pinctrl-bindings.txt 28 for details of the property values. 29- pinctrl-names : Must contain a "default" entry. 30- reg : Must contain an address for each entry in reg-names. 31- reg-names : A list which must include the following entries: 32 * "lpass-lpaif" 33- #address-cells : Must be 1 34- #size-cells : Must be 0 35 36 37 38Optional properties: 39 40- qcom,adsp : Phandle for the audio DSP node 41 42By default, the driver uses up to 4 MI2S SD lines, for a total of 8 channels. 43The SD lines to use can be configured by adding subnodes for each of the DAIs. 44 45Required properties for each DAI (represented by a subnode): 46- reg : Must be one of the DAI IDs 47 (usually part of dt-bindings header) 48- qcom,playback-sd-lines: List of serial data lines to use for playback 49 Each SD line should be represented by a number from 0-3. 50- qcom,capture-sd-lines : List of serial data lines to use for capture 51 Each SD line should be represented by a number from 0-3. 52 53Note that adding a subnode changes the default to "no lines configured", 54so both playback and capture lines should be configured when a subnode is added. 55 56Example: 57 58lpass@28100000 { 59 compatible = "qcom,lpass-cpu"; 60 clocks = <&lcc AHBIX_CLK>, <&lcc MI2S_OSR_CLK>, <&lcc MI2S_BIT_CLK>; 61 clock-names = "ahbix-clk", "mi2s-osr-clk", "mi2s-bit-clk"; 62 interrupts = <0 85 1>; 63 interrupt-names = "lpass-irq-lpaif"; 64 pinctrl-names = "default", "idle"; 65 pinctrl-0 = <&mi2s_default>; 66 pinctrl-1 = <&mi2s_idle>; 67 reg = <0x28100000 0x10000>; 68 reg-names = "lpass-lpaif"; 69 qcom,adsp = <&adsp>; 70 71 #address-cells = <1>; 72 #size-cells = <0>; 73 74 /* Optional to set different MI2S SD lines */ 75 dai@3 { 76 reg = <MI2S_QUATERNARY>; 77 qcom,playback-sd-lines = <0 1>; 78 }; 79}; 80