1*c66ec88fSEmmanuel VadotNVIDIA Tegra30 I2S controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible : For Tegra30, must contain "nvidia,tegra30-i2s". For Tegra124, 5*c66ec88fSEmmanuel Vadot must contain "nvidia,tegra124-i2s". Otherwise, must contain 6*c66ec88fSEmmanuel Vadot "nvidia,<chip>-i2s" plus at least one of the above, where <chip> is 7*c66ec88fSEmmanuel Vadot tegra114 or tegra132. 8*c66ec88fSEmmanuel Vadot- reg : Should contain I2S registers location and length 9*c66ec88fSEmmanuel Vadot- clocks : Must contain one entry, for the module clock. 10*c66ec88fSEmmanuel Vadot See ../clocks/clock-bindings.txt for details. 11*c66ec88fSEmmanuel Vadot- resets : Must contain an entry for each entry in reset-names. 12*c66ec88fSEmmanuel Vadot See ../reset/reset.txt for details. 13*c66ec88fSEmmanuel Vadot- reset-names : Must include the following entries: 14*c66ec88fSEmmanuel Vadot - i2s 15*c66ec88fSEmmanuel Vadot- nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback) 16*c66ec88fSEmmanuel Vadot first, tx (capture) second. See nvidia,tegra30-ahub.txt for values. 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel VadotExample: 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel Vadoti2s@70080300 { 21*c66ec88fSEmmanuel Vadot compatible = "nvidia,tegra30-i2s"; 22*c66ec88fSEmmanuel Vadot reg = <0x70080300 0x100>; 23*c66ec88fSEmmanuel Vadot nvidia,ahub-cif-ids = <4 4>; 24*c66ec88fSEmmanuel Vadot clocks = <&tegra_car 11>; 25*c66ec88fSEmmanuel Vadot resets = <&tegra_car 11>; 26*c66ec88fSEmmanuel Vadot reset-names = "i2s"; 27*c66ec88fSEmmanuel Vadot}; 28