1NVIDIA Tegra audio complex, with SGTL5000 CODEC 2 3Required properties: 4- compatible : "nvidia,tegra-audio-sgtl5000" 5- clocks : Must contain an entry for each entry in clock-names. 6 See ../clocks/clock-bindings.txt for details. 7- clock-names : Must include the following entries: 8 - pll_a 9 - pll_a_out0 10 - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk) 11- nvidia,model : The user-visible name of this sound complex. 12- nvidia,audio-routing : A list of the connections between audio components. 13 Each entry is a pair of strings, the first being the connection's sink, 14 the second being the connection's source. Valid names for sources and 15 sinks are the SGTL5000's pins (as documented in its binding), and the jacks 16 on the board: 17 18 * Headphone Jack 19 * Line In Jack 20 * Mic Jack 21 22- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's 23 connected to the CODEC. 24- nvidia,audio-codec : The phandle of the SGTL5000 audio codec. 25 26Example: 27 28sound { 29 compatible = "toradex,tegra-audio-sgtl5000-apalis_t30", 30 "nvidia,tegra-audio-sgtl5000"; 31 nvidia,model = "Toradex Apalis T30"; 32 nvidia,audio-routing = 33 "Headphone Jack", "HP_OUT", 34 "LINE_IN", "Line In Jack", 35 "MIC_IN", "Mic Jack"; 36 nvidia,i2s-controller = <&tegra_i2s2>; 37 nvidia,audio-codec = <&sgtl5000>; 38 clocks = <&tegra_car TEGRA30_CLK_PLL_A>, 39 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 40 <&tegra_car TEGRA30_CLK_EXTERN1>; 41 clock-names = "pll_a", "pll_a_out0", "mclk"; 42}; 43