1NVIDIA Tegra audio complex, with RT5677 CODEC 2 3Required properties: 4- compatible : "nvidia,tegra-audio-rt5677" 5- clocks : Must contain an entry for each entry in clock-names. 6 See ../clocks/clock-bindings.txt for details. 7- clock-names : Must include the following entries: 8 - pll_a 9 - pll_a_out0 10 - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk) 11- nvidia,model : The user-visible name of this sound complex. 12- nvidia,audio-routing : A list of the connections between audio components. 13 Each entry is a pair of strings, the first being the connection's sink, 14 the second being the connection's source. Valid names for sources and 15 sinks are the RT5677's pins (as documented in its binding), and the jacks 16 on the board: 17 18 * Headphone 19 * Speaker 20 * Headset Mic 21 * Internal Mic 1 22 * Internal Mic 2 23 24- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's 25 connected to the CODEC. 26- nvidia,audio-codec : The phandle of the RT5677 audio codec. This binding 27 assumes that AIF1 on the CODEC is connected to Tegra. 28 29Optional properties: 30- nvidia,hp-det-gpios : The GPIO that detects headphones are plugged in 31- nvidia,hp-en-gpios : The GPIO that enables headphone amplifier 32- nvidia,mic-present-gpios: The GPIO that mic jack is plugged in 33- nvidia,dmic-clk-en-gpios : The GPIO that gates DMIC clock signal 34 35Example: 36 37sound { 38 compatible = "nvidia,tegra-audio-rt5677-ryu", 39 "nvidia,tegra-audio-rt5677"; 40 nvidia,model = "NVIDIA Tegra Ryu"; 41 42 nvidia,audio-routing = 43 "Headphone", "LOUT2", 44 "Headphone", "LOUT1", 45 "Headset Mic", "MICBIAS1", 46 "IN1P", "Headset Mic", 47 "IN1N", "Headset Mic", 48 "DMIC L1", "Internal Mic 1", 49 "DMIC R1", "Internal Mic 1", 50 "DMIC L2", "Internal Mic 2", 51 "DMIC R2", "Internal Mic 2", 52 "Speaker", "PDM1L", 53 "Speaker", "PDM1R"; 54 55 nvidia,i2s-controller = <&tegra_i2s1>; 56 nvidia,audio-codec = <&rt5677>; 57 58 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>; 59 nvidia,mic-present-gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>; 60 nvidia,hp-en-gpios = <&rt5677 1 GPIO_ACTIVE_HIGH>; 61 nvidia,dmic-clk-en-gpios = <&rt5677 2 GPIO_ACTIVE_HIGH>; 62 63 clocks = <&tegra_car TEGRA124_CLK_PLL_A>, 64 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 65 <&tegra_car TEGRA124_CLK_EXTERN1>; 66 clock-names = "pll_a", "pll_a_out0", "mclk"; 67}; 68