1Freescale Synchronous Serial Interface 2 3The SSI is a serial device that communicates with audio codecs. It can 4be programmed in AC97, I2S, left-justified, or right-justified modes. 5 6Required properties: 7- compatible: Compatible list, should contain one of the following 8 compatibles: 9 fsl,mpc8610-ssi 10 fsl,imx51-ssi 11 fsl,imx35-ssi 12 fsl,imx21-ssi 13- cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on. 14- reg: Offset and length of the register set for the device. 15- interrupts: <a b> where a is the interrupt number and b is a 16 field that represents an encoding of the sense and 17 level information for the interrupt. This should be 18 encoded based on the information in section 2) 19 depending on the type of interrupt controller you 20 have. 21- fsl,fifo-depth: The number of elements in the transmit and receive FIFOs. 22 This number is the maximum allowed value for SFCSR[TFWM0]. 23 - clocks: "ipg" - Required clock for the SSI unit 24 "baud" - Required clock for SSI master mode. Otherwise this 25 clock is not used 26 27Required are also ac97 link bindings if ac97 is used. See 28Documentation/devicetree/bindings/sound/soc-ac97link.txt for the necessary 29bindings. 30 31Optional properties: 32- codec-handle: Phandle to a 'codec' node that defines an audio 33 codec connected to this SSI. This node is typically 34 a child of an I2C or other control node. 35- fsl,fiq-stream-filter: Bool property. Disabled DMA and use FIQ instead to 36 filter the codec stream. This is necessary for some boards 37 where an incompatible codec is connected to this SSI, e.g. 38 on pca100 and pcm043. 39- dmas: Generic dma devicetree binding as described in 40 Documentation/devicetree/bindings/dma/dma.txt. 41- dma-names: Two dmas have to be defined, "tx" and "rx", if fsl,imx-fiq 42 is not defined. 43- fsl,mode: The operating mode for the AC97 interface only. 44 "ac97-slave" - AC97 mode, SSI is clock slave 45 "ac97-master" - AC97 mode, SSI is clock master 46- fsl,ssi-asynchronous: 47 If specified, the SSI is to be programmed in asynchronous 48 mode. In this mode, pins SRCK, STCK, SRFS, and STFS must 49 all be connected to valid signals. In synchronous mode, 50 SRCK and SRFS are ignored. Asynchronous mode allows 51 playback and capture to use different sample sizes and 52 sample rates. Some drivers may require that SRCK and STCK 53 be connected together, and SRFS and STFS be connected 54 together. This would still allow different sample sizes, 55 but not different sample rates. 56- fsl,playback-dma: Phandle to a node for the DMA channel to use for 57 playback of audio. This is typically dictated by SOC 58 design. See the notes below. 59 Only used on Power Architecture. 60- fsl,capture-dma: Phandle to a node for the DMA channel to use for 61 capture (recording) of audio. This is typically dictated 62 by SOC design. See the notes below. 63 Only used on Power Architecture. 64 65Child 'codec' node required properties: 66- compatible: Compatible list, contains the name of the codec 67 68Child 'codec' node optional properties: 69- clock-frequency: The frequency of the input clock, which typically comes 70 from an on-board dedicated oscillator. 71 72Notes on fsl,playback-dma and fsl,capture-dma: 73 74On SOCs that have an SSI, specific DMA channels are hard-wired for playback 75and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for 76playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for 77playback and DMA channel 3 for capture. The developer can choose which 78DMA controller to use, but the channels themselves are hard-wired. The 79purpose of these two properties is to represent this hardware design. 80 81The device tree nodes for the DMA channels that are referenced by 82"fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with 83"fsl,ssi-dma-channel". The SOC-specific compatible string (e.g. 84"fsl,mpc8610-dma-channel") can remain. If these nodes are left as 85"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA 86drivers (fsldma) will attempt to use them, and it will conflict with the 87sound drivers. 88