1Freescale Asynchronous Sample Rate Converter (ASRC) Controller 2 3The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a 4signal associated with an input clock into a signal associated with a different 5output clock. The driver currently works as a Front End of DPCM with other Back 6Ends Audio controller such as ESAI, SSI and SAI. It has three pairs to support 7three substreams within totally 10 channels. 8 9Required properties: 10 11 - compatible : Compatible list, should contain one of the following 12 compatibles: 13 "fsl,imx35-asrc", 14 "fsl,imx53-asrc", 15 "fsl,imx8qm-asrc", 16 "fsl,imx8qxp-asrc", 17 18 - reg : Offset and length of the register set for the device. 19 20 - interrupts : Contains the spdif interrupt. 21 22 - dmas : Generic dma devicetree binding as described in 23 Documentation/devicetree/bindings/dma/dma.txt. 24 25 - dma-names : Contains "rxa", "rxb", "rxc", "txa", "txb" and "txc". 26 27 - clocks : Contains an entry for each entry in clock-names. 28 29 - clock-names : Contains the following entries 30 "mem" Peripheral access clock to access registers. 31 "ipg" Peripheral clock to driver module. 32 "asrck_<0-f>" Clock sources for input and output clock. 33 "spba" The spba clock is required when ASRC is placed as a 34 bus slave of the Shared Peripheral Bus and when two 35 or more bus masters (CPU, DMA or DSP) try to access 36 it. This property is optional depending on the SoC 37 design. 38 39 - fsl,asrc-rate : Defines a mutual sample rate used by DPCM Back Ends. 40 41 - fsl,asrc-width : Defines a mutual sample width used by DPCM Back Ends. 42 43 - fsl,asrc-clk-map : Defines clock map used in driver. which is required 44 by imx8qm/imx8qxp platform 45 <0> - select the map for asrc0 in imx8qm/imx8qxp 46 <1> - select the map for asrc1 in imx8qm/imx8qxp 47 48Optional properties: 49 50 - big-endian : If this property is absent, the little endian mode 51 will be in use as default. Otherwise, the big endian 52 mode will be in use for all the device registers. 53 54 - fsl,asrc-format : Defines a mutual sample format used by DPCM Back 55 Ends, which can replace the fsl,asrc-width. 56 The value is 2 (S16_LE), or 6 (S24_LE). 57 58Example: 59 60asrc: asrc@2034000 { 61 compatible = "fsl,imx53-asrc"; 62 reg = <0x02034000 0x4000>; 63 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; 64 clocks = <&clks 107>, <&clks 107>, <&clks 0>, 65 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, 66 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, 67 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, 68 <&clks 107>, <&clks 0>, <&clks 0>; 69 clock-names = "mem", "ipg", "asrck0", 70 "asrck_1", "asrck_2", "asrck_3", "asrck_4", 71 "asrck_5", "asrck_6", "asrck_7", "asrck_8", 72 "asrck_9", "asrck_a", "asrck_b", "asrck_c", 73 "asrck_d", "asrck_e", "asrck_f"; 74 dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>, 75 <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; 76 dma-names = "rxa", "rxb", "rxc", 77 "txa", "txb", "txc"; 78 fsl,asrc-rate = <48000>; 79 fsl,asrc-width = <16>; 80}; 81