xref: /freebsd/sys/contrib/device-tree/Bindings/soc/ti/k3-ringacc.yaml (revision dc318a4ffabcbfa23bb56a33403aad36e6de30af) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Texas Instruments K3 NavigatorSS Ring Accelerator
9
10maintainers:
11  - Santosh Shilimkar <ssantosh@kernel.org>
12  - Grygorii Strashko <grygorii.strashko@ti.com>
13
14description: |
15  The Ring Accelerator (RA) is a machine which converts read/write accesses
16  from/to a constant address into corresponding read/write accesses from/to a
17  circular data structure in memory. The RA eliminates the need for each DMA
18  controller which needs to access ring elements from having to know the current
19  state of the ring (base address, current offset). The DMA controller
20  performs a read or write access to a specific address range (which maps to the
21  source interface on the RA) and the RA replaces the address for the transaction
22  with a new address which corresponds to the head or tail element of the ring
23  (head for reads, tail for writes).
24
25  The Ring Accelerator is a hardware module that is responsible for accelerating
26  management of the packet queues. The K3 SoCs can have more than one RA instances
27
28properties:
29  compatible:
30    items:
31      - const: ti,am654-navss-ringacc
32
33  reg:
34    items:
35      - description: real time registers regions
36      - description: fifos registers regions
37      - description: proxy gcfg registers regions
38      - description: proxy target registers regions
39
40  reg-names:
41    items:
42      - const: rt
43      - const: fifos
44      - const: proxy_gcfg
45      - const: proxy_target
46
47  msi-parent: true
48
49  ti,num-rings:
50    $ref: /schemas/types.yaml#/definitions/uint32
51    description: Number of rings supported by RA
52
53  ti,sci-rm-range-gp-rings:
54    $ref: /schemas/types.yaml#/definitions/uint32
55    description: TI-SCI RM subtype for GP ring range
56
57  ti,sci:
58    $ref: /schemas/types.yaml#definitions/phandle-array
59    description: phandle on TI-SCI compatible System controller node
60
61  ti,sci-dev-id:
62    $ref: /schemas/types.yaml#/definitions/uint32
63    description: TI-SCI device id of the ring accelerator
64
65required:
66  - compatible
67  - reg
68  - reg-names
69  - msi-parent
70  - ti,num-rings
71  - ti,sci-rm-range-gp-rings
72  - ti,sci
73  - ti,sci-dev-id
74
75additionalProperties: false
76
77examples:
78  - |
79    bus {
80        #address-cells = <2>;
81        #size-cells = <2>;
82
83        ringacc: ringacc@3c000000 {
84            compatible = "ti,am654-navss-ringacc";
85            reg = <0x0 0x3c000000 0x0 0x400000>,
86                  <0x0 0x38000000 0x0 0x400000>,
87                  <0x0 0x31120000 0x0 0x100>,
88                  <0x0 0x33000000 0x0 0x40000>;
89            reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
90            ti,num-rings = <818>;
91            ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
92            ti,sci = <&dmsc>;
93            ti,sci-dev-id = <187>;
94            msi-parent = <&inta_main_udmass>;
95        };
96    };
97