xref: /freebsd/sys/contrib/device-tree/Bindings/soc/tegra/nvidia,tegra20-pmc.yaml (revision 84943d6f38e936ac3b7a3947ca26eeb27a39f938)
1*84943d6fSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*84943d6fSEmmanuel Vadot%YAML 1.2
3*84943d6fSEmmanuel Vadot---
4*84943d6fSEmmanuel Vadot$id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5*84943d6fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*84943d6fSEmmanuel Vadot
7*84943d6fSEmmanuel Vadottitle: Tegra Power Management Controller (PMC)
8*84943d6fSEmmanuel Vadot
9*84943d6fSEmmanuel Vadotmaintainers:
10*84943d6fSEmmanuel Vadot  - Thierry Reding <thierry.reding@gmail.com>
11*84943d6fSEmmanuel Vadot  - Jonathan Hunter <jonathanh@nvidia.com>
12*84943d6fSEmmanuel Vadot
13*84943d6fSEmmanuel Vadotproperties:
14*84943d6fSEmmanuel Vadot  compatible:
15*84943d6fSEmmanuel Vadot    enum:
16*84943d6fSEmmanuel Vadot      - nvidia,tegra20-pmc
17*84943d6fSEmmanuel Vadot      - nvidia,tegra30-pmc
18*84943d6fSEmmanuel Vadot      - nvidia,tegra114-pmc
19*84943d6fSEmmanuel Vadot      - nvidia,tegra124-pmc
20*84943d6fSEmmanuel Vadot      - nvidia,tegra210-pmc
21*84943d6fSEmmanuel Vadot
22*84943d6fSEmmanuel Vadot  reg:
23*84943d6fSEmmanuel Vadot    maxItems: 1
24*84943d6fSEmmanuel Vadot
25*84943d6fSEmmanuel Vadot  clock-names:
26*84943d6fSEmmanuel Vadot    items:
27*84943d6fSEmmanuel Vadot      # Tegra clock of the same name
28*84943d6fSEmmanuel Vadot      - const: pclk
29*84943d6fSEmmanuel Vadot      # 32 KHz clock input
30*84943d6fSEmmanuel Vadot      - const: clk32k_in
31*84943d6fSEmmanuel Vadot
32*84943d6fSEmmanuel Vadot  clocks:
33*84943d6fSEmmanuel Vadot    maxItems: 2
34*84943d6fSEmmanuel Vadot
35*84943d6fSEmmanuel Vadot  '#clock-cells':
36*84943d6fSEmmanuel Vadot    const: 1
37*84943d6fSEmmanuel Vadot    description: |
38*84943d6fSEmmanuel Vadot      Tegra PMC has clk_out_1, clk_out_2, and clk_out_3. PMC also has blink
39*84943d6fSEmmanuel Vadot      control which allows 32Khz clock output to Tegra blink pad.
40*84943d6fSEmmanuel Vadot
41*84943d6fSEmmanuel Vadot      Consumer of PMC clock should specify the desired clock by having the
42*84943d6fSEmmanuel Vadot      clock ID in its "clocks" phandle cell with PMC clock provider. See
43*84943d6fSEmmanuel Vadot      include/dt-bindings/soc/tegra-pmc.h for the list of Tegra PMC clock IDs.
44*84943d6fSEmmanuel Vadot
45*84943d6fSEmmanuel Vadot  '#interrupt-cells':
46*84943d6fSEmmanuel Vadot    const: 2
47*84943d6fSEmmanuel Vadot    description: Specifies number of cells needed to encode an interrupt
48*84943d6fSEmmanuel Vadot      source.
49*84943d6fSEmmanuel Vadot
50*84943d6fSEmmanuel Vadot  interrupt-controller: true
51*84943d6fSEmmanuel Vadot
52*84943d6fSEmmanuel Vadot  nvidia,invert-interrupt:
53*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/flag
54*84943d6fSEmmanuel Vadot    description: Inverts the PMU interrupt signal. The PMU is an external Power
55*84943d6fSEmmanuel Vadot      Management Unit, whose interrupt output signal is fed into the PMC. This
56*84943d6fSEmmanuel Vadot      signal is optionally inverted, and then fed into the ARM GIC. The PMC is
57*84943d6fSEmmanuel Vadot      not involved in the detection or handling of this interrupt signal,
58*84943d6fSEmmanuel Vadot      merely its inversion.
59*84943d6fSEmmanuel Vadot
60*84943d6fSEmmanuel Vadot  nvidia,core-power-req-active-high:
61*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/flag
62*84943d6fSEmmanuel Vadot    description: core power request active-high
63*84943d6fSEmmanuel Vadot
64*84943d6fSEmmanuel Vadot  nvidia,sys-clock-req-active-high:
65*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/flag
66*84943d6fSEmmanuel Vadot    description: system clock request active-high
67*84943d6fSEmmanuel Vadot
68*84943d6fSEmmanuel Vadot  nvidia,combined-power-req:
69*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/flag
70*84943d6fSEmmanuel Vadot    description: combined power request for CPU and core
71*84943d6fSEmmanuel Vadot
72*84943d6fSEmmanuel Vadot  nvidia,cpu-pwr-good-en:
73*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/flag
74*84943d6fSEmmanuel Vadot    description: CPU power good signal from external PMIC to PMC is enabled
75*84943d6fSEmmanuel Vadot
76*84943d6fSEmmanuel Vadot  nvidia,suspend-mode:
77*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32
78*84943d6fSEmmanuel Vadot    description: the suspend mode that the platform should use
79*84943d6fSEmmanuel Vadot    oneOf:
80*84943d6fSEmmanuel Vadot      - description: LP0, CPU + Core voltage off and DRAM in self-refresh
81*84943d6fSEmmanuel Vadot        const: 0
82*84943d6fSEmmanuel Vadot      - description: LP1, CPU voltage off and DRAM in self-refresh
83*84943d6fSEmmanuel Vadot        const: 1
84*84943d6fSEmmanuel Vadot      - description: LP2, CPU voltage off
85*84943d6fSEmmanuel Vadot        const: 2
86*84943d6fSEmmanuel Vadot
87*84943d6fSEmmanuel Vadot  nvidia,cpu-pwr-good-time:
88*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32
89*84943d6fSEmmanuel Vadot    description: CPU power good time in microseconds
90*84943d6fSEmmanuel Vadot
91*84943d6fSEmmanuel Vadot  nvidia,cpu-pwr-off-time:
92*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32
93*84943d6fSEmmanuel Vadot    description: CPU power off time in microseconds
94*84943d6fSEmmanuel Vadot
95*84943d6fSEmmanuel Vadot  nvidia,core-pwr-good-time:
96*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32-array
97*84943d6fSEmmanuel Vadot    description: core power good time in microseconds
98*84943d6fSEmmanuel Vadot    items:
99*84943d6fSEmmanuel Vadot      - description: oscillator stable time
100*84943d6fSEmmanuel Vadot      - description: power stable time
101*84943d6fSEmmanuel Vadot
102*84943d6fSEmmanuel Vadot  nvidia,core-pwr-off-time:
103*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32
104*84943d6fSEmmanuel Vadot    description: core power off time in microseconds
105*84943d6fSEmmanuel Vadot
106*84943d6fSEmmanuel Vadot  nvidia,lp0-vec:
107*84943d6fSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32-array
108*84943d6fSEmmanuel Vadot    description: |
109*84943d6fSEmmanuel Vadot      Starting address and length of LP0 vector. The LP0 vector contains the
110*84943d6fSEmmanuel Vadot      warm boot code that is executed by AVP when resuming from the LP0 state.
111*84943d6fSEmmanuel Vadot      The AVP (Audio-Video Processor) is an ARM7 processor and always being
112*84943d6fSEmmanuel Vadot      the first boot processor when chip is power on or resume from deep sleep
113*84943d6fSEmmanuel Vadot      mode. When the system is resumed from the deep sleep mode, the warm boot
114*84943d6fSEmmanuel Vadot      code will restore some PLLs, clocks and then brings up CPU0 for resuming
115*84943d6fSEmmanuel Vadot      the system.
116*84943d6fSEmmanuel Vadot    items:
117*84943d6fSEmmanuel Vadot      - description: starting address of LP0 vector
118*84943d6fSEmmanuel Vadot      - description: length of LP0 vector
119*84943d6fSEmmanuel Vadot
120*84943d6fSEmmanuel Vadot  core-supply:
121*84943d6fSEmmanuel Vadot    description: phandle to voltage regulator connected to the SoC core power
122*84943d6fSEmmanuel Vadot      rail
123*84943d6fSEmmanuel Vadot
124*84943d6fSEmmanuel Vadot  core-domain:
125*84943d6fSEmmanuel Vadot    type: object
126*84943d6fSEmmanuel Vadot    description: The vast majority of hardware blocks of Tegra SoC belong to a
127*84943d6fSEmmanuel Vadot      core power domain, which has a dedicated voltage rail that powers the
128*84943d6fSEmmanuel Vadot      blocks.
129*84943d6fSEmmanuel Vadot    additionalProperties: false
130*84943d6fSEmmanuel Vadot    properties:
131*84943d6fSEmmanuel Vadot      operating-points-v2:
132*84943d6fSEmmanuel Vadot        description: Should contain level, voltages and opp-supported-hw
133*84943d6fSEmmanuel Vadot          property. The supported-hw is a bitfield indicating SoC speedo or
134*84943d6fSEmmanuel Vadot          process ID mask.
135*84943d6fSEmmanuel Vadot
136*84943d6fSEmmanuel Vadot      "#power-domain-cells":
137*84943d6fSEmmanuel Vadot        const: 0
138*84943d6fSEmmanuel Vadot
139*84943d6fSEmmanuel Vadot    required:
140*84943d6fSEmmanuel Vadot      - operating-points-v2
141*84943d6fSEmmanuel Vadot      - "#power-domain-cells"
142*84943d6fSEmmanuel Vadot
143*84943d6fSEmmanuel Vadot  i2c-thermtrip:
144*84943d6fSEmmanuel Vadot    type: object
145*84943d6fSEmmanuel Vadot    description: On Tegra30, Tegra114 and Tegra124 if i2c-thermtrip subnode
146*84943d6fSEmmanuel Vadot      exists, hardware-triggered thermal reset will be enabled.
147*84943d6fSEmmanuel Vadot    additionalProperties: false
148*84943d6fSEmmanuel Vadot    properties:
149*84943d6fSEmmanuel Vadot      nvidia,i2c-controller-id:
150*84943d6fSEmmanuel Vadot        $ref: /schemas/types.yaml#/definitions/uint32
151*84943d6fSEmmanuel Vadot        description: ID of I2C controller to send poweroff command to PMU.
152*84943d6fSEmmanuel Vadot          Valid values are described in section 9.2.148 "APBDEV_PMC_SCRATCH53_0"
153*84943d6fSEmmanuel Vadot          of the Tegra K1 Technical Reference Manual.
154*84943d6fSEmmanuel Vadot
155*84943d6fSEmmanuel Vadot      nvidia,bus-addr:
156*84943d6fSEmmanuel Vadot        $ref: /schemas/types.yaml#/definitions/uint32
157*84943d6fSEmmanuel Vadot        description: bus address of the PMU on the I2C bus
158*84943d6fSEmmanuel Vadot
159*84943d6fSEmmanuel Vadot      nvidia,reg-addr:
160*84943d6fSEmmanuel Vadot        $ref: /schemas/types.yaml#/definitions/uint32
161*84943d6fSEmmanuel Vadot        description: PMU I2C register address to issue poweroff command
162*84943d6fSEmmanuel Vadot
163*84943d6fSEmmanuel Vadot      nvidia,reg-data:
164*84943d6fSEmmanuel Vadot        $ref: /schemas/types.yaml#/definitions/uint32
165*84943d6fSEmmanuel Vadot        description: power-off command to write to PMU
166*84943d6fSEmmanuel Vadot
167*84943d6fSEmmanuel Vadot      nvidia,pinmux-id:
168*84943d6fSEmmanuel Vadot        $ref: /schemas/types.yaml#/definitions/uint32
169*84943d6fSEmmanuel Vadot        description: Pinmux used by the hardware when issuing power-off command.
170*84943d6fSEmmanuel Vadot          Defaults to 0. Valid values are described in section 12.5.2 "Pinmux
171*84943d6fSEmmanuel Vadot          Support" of the Tegra4 Technical Reference Manual.
172*84943d6fSEmmanuel Vadot
173*84943d6fSEmmanuel Vadot    required:
174*84943d6fSEmmanuel Vadot      - nvidia,i2c-controller-id
175*84943d6fSEmmanuel Vadot      - nvidia,bus-addr
176*84943d6fSEmmanuel Vadot      - nvidia,reg-addr
177*84943d6fSEmmanuel Vadot      - nvidia,reg-data
178*84943d6fSEmmanuel Vadot
179*84943d6fSEmmanuel Vadot  powergates:
180*84943d6fSEmmanuel Vadot    type: object
181*84943d6fSEmmanuel Vadot    additionalProperties: false
182*84943d6fSEmmanuel Vadot    description: |
183*84943d6fSEmmanuel Vadot      This node contains a hierarchy of power domain nodes, which should match
184*84943d6fSEmmanuel Vadot      the powergates on the Tegra SoC. Each powergate node represents a power-
185*84943d6fSEmmanuel Vadot      domain on the Tegra SoC that can be power-gated by the Tegra PMC.
186*84943d6fSEmmanuel Vadot
187*84943d6fSEmmanuel Vadot      Hardware blocks belonging to a power domain should contain "power-domains"
188*84943d6fSEmmanuel Vadot      property that is a phandle pointing to corresponding powergate node.
189*84943d6fSEmmanuel Vadot
190*84943d6fSEmmanuel Vadot      The name of the powergate node should be one of the below. Note that not
191*84943d6fSEmmanuel Vadot      every powergate is applicable to all Tegra devices and the following list
192*84943d6fSEmmanuel Vadot      shows which powergates are applicable to which devices.
193*84943d6fSEmmanuel Vadot
194*84943d6fSEmmanuel Vadot      Please refer to Tegra TRM for mode details on the powergate nodes to use
195*84943d6fSEmmanuel Vadot      for each power-gate block inside Tegra.
196*84943d6fSEmmanuel Vadot
197*84943d6fSEmmanuel Vadot        Name     Description                   Devices Applicable
198*84943d6fSEmmanuel Vadot        --------------------------------------------------------------
199*84943d6fSEmmanuel Vadot        3d       3D Graphics                   Tegra20/114/124/210
200*84943d6fSEmmanuel Vadot        3d0      3D Graphics 0                 Tegra30
201*84943d6fSEmmanuel Vadot        3d1      3D Graphics 1                 Tegra30
202*84943d6fSEmmanuel Vadot        aud      Audio                         Tegra210
203*84943d6fSEmmanuel Vadot        dfd      Debug                         Tegra210
204*84943d6fSEmmanuel Vadot        dis      Display A                     Tegra114/124/210
205*84943d6fSEmmanuel Vadot        disb     Display B                     Tegra114/124/210
206*84943d6fSEmmanuel Vadot        heg      2D Graphics                   Tegra30/114/124/210
207*84943d6fSEmmanuel Vadot        iram     Internal RAM                  Tegra124/210
208*84943d6fSEmmanuel Vadot        mpe      MPEG Encode                   All
209*84943d6fSEmmanuel Vadot        nvdec    NVIDIA Video Decode Engine    Tegra210
210*84943d6fSEmmanuel Vadot        nvjpg    NVIDIA JPEG Engine            Tegra210
211*84943d6fSEmmanuel Vadot        pcie     PCIE                          Tegra20/30/124/210
212*84943d6fSEmmanuel Vadot        sata     SATA                          Tegra30/124/210
213*84943d6fSEmmanuel Vadot        sor      Display interfaces            Tegra124/210
214*84943d6fSEmmanuel Vadot        ve2      Video Encode Engine 2         Tegra210
215*84943d6fSEmmanuel Vadot        venc     Video Encode Engine           All
216*84943d6fSEmmanuel Vadot        vdec     Video Decode Engine           Tegra20/30/114/124
217*84943d6fSEmmanuel Vadot        vic      Video Imaging Compositor      Tegra124/210
218*84943d6fSEmmanuel Vadot        xusba    USB Partition A               Tegra114/124/210
219*84943d6fSEmmanuel Vadot        xusbb    USB Partition B               Tegra114/124/210
220*84943d6fSEmmanuel Vadot        xusbc    USB Partition C               Tegra114/124/210
221*84943d6fSEmmanuel Vadot
222*84943d6fSEmmanuel Vadot    patternProperties:
223*84943d6fSEmmanuel Vadot      "^[a-z0-9]+$":
224*84943d6fSEmmanuel Vadot        type: object
225*84943d6fSEmmanuel Vadot        additionalProperties: false
226*84943d6fSEmmanuel Vadot        properties:
227*84943d6fSEmmanuel Vadot          clocks:
228*84943d6fSEmmanuel Vadot            minItems: 1
229*84943d6fSEmmanuel Vadot            maxItems: 10
230*84943d6fSEmmanuel Vadot
231*84943d6fSEmmanuel Vadot          resets:
232*84943d6fSEmmanuel Vadot            minItems: 1
233*84943d6fSEmmanuel Vadot            maxItems: 8
234*84943d6fSEmmanuel Vadot
235*84943d6fSEmmanuel Vadot          power-domains:
236*84943d6fSEmmanuel Vadot            maxItems: 1
237*84943d6fSEmmanuel Vadot
238*84943d6fSEmmanuel Vadot          '#power-domain-cells':
239*84943d6fSEmmanuel Vadot            const: 0
240*84943d6fSEmmanuel Vadot            description: Must be 0.
241*84943d6fSEmmanuel Vadot
242*84943d6fSEmmanuel Vadot        required:
243*84943d6fSEmmanuel Vadot          - clocks
244*84943d6fSEmmanuel Vadot          - resets
245*84943d6fSEmmanuel Vadot          - '#power-domain-cells'
246*84943d6fSEmmanuel Vadot
247*84943d6fSEmmanuel Vadot  pinmux:
248*84943d6fSEmmanuel Vadot    type: object
249*84943d6fSEmmanuel Vadot    additionalProperties:
250*84943d6fSEmmanuel Vadot      type: object
251*84943d6fSEmmanuel Vadot      description: |
252*84943d6fSEmmanuel Vadot        This is a pad configuration node. On Tegra SoCs a pad is a set of pins
253*84943d6fSEmmanuel Vadot        which are configured as a group. The pin grouping is a fixed attribute
254*84943d6fSEmmanuel Vadot        of the hardware. The PMC can be used to set pad power state and
255*84943d6fSEmmanuel Vadot        signaling voltage. A pad can be either in active or power down mode.
256*84943d6fSEmmanuel Vadot        The support for power state and signaling voltage configuration varies
257*84943d6fSEmmanuel Vadot        depending on the pad in question. 3.3V and 1.8V signaling voltages are
258*84943d6fSEmmanuel Vadot        supported on pins where software controllable signaling voltage
259*84943d6fSEmmanuel Vadot        switching is available.
260*84943d6fSEmmanuel Vadot
261*84943d6fSEmmanuel Vadot        The pad configuration state nodes are placed under the pmc node and
262*84943d6fSEmmanuel Vadot        they are referred to by the pinctrl client properties. For more
263*84943d6fSEmmanuel Vadot        information see:
264*84943d6fSEmmanuel Vadot
265*84943d6fSEmmanuel Vadot          Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
266*84943d6fSEmmanuel Vadot
267*84943d6fSEmmanuel Vadot        The pad name should be used as the value of the pins property in pin
268*84943d6fSEmmanuel Vadot        configuration nodes.
269*84943d6fSEmmanuel Vadot
270*84943d6fSEmmanuel Vadot        The following pads are present on Tegra124 and Tegra132:
271*84943d6fSEmmanuel Vadot
272*84943d6fSEmmanuel Vadot          audio, bb, cam, comp, csia, csb, cse, dsi, dsib, dsic, dsid, hdmi,
273*84943d6fSEmmanuel Vadot          hsic, hv, lvds, mipi-bias, nand, pex-bias, pex-clk1, pex-clk2,
274*84943d6fSEmmanuel Vadot          pex-cntrl, sdmmc1, sdmmc3, sdmmc4, sys_ddc, uart, usb0, usb1, usb2,
275*84943d6fSEmmanuel Vadot          usb_bias
276*84943d6fSEmmanuel Vadot
277*84943d6fSEmmanuel Vadot        The following pads are present on Tegra210:
278*84943d6fSEmmanuel Vadot
279*84943d6fSEmmanuel Vadot          audio, audio-hv, cam, csia, csib, csic, csid, csie, csif, dbg,
280*84943d6fSEmmanuel Vadot          debug-nonao, dmic, dp, dsi, dsib, dsic, dsid, emmc, emmc2, gpio,
281*84943d6fSEmmanuel Vadot          hdmi, hsic, lvds, mipi-bias, pex-bias, pex-clk1, pex-clk2, pex-cntrl,
282*84943d6fSEmmanuel Vadot          sdmmc1, sdmmc3, spi, spi-hv, uart, usb0, usb1, usb2, usb3, usb-bias
283*84943d6fSEmmanuel Vadot      additionalProperties: false
284*84943d6fSEmmanuel Vadot      properties:
285*84943d6fSEmmanuel Vadot        pins:
286*84943d6fSEmmanuel Vadot          $ref: /schemas/types.yaml#/definitions/string-array
287*84943d6fSEmmanuel Vadot          description: Must contain name of the pad(s) to be configured.
288*84943d6fSEmmanuel Vadot
289*84943d6fSEmmanuel Vadot        low-power-enable:
290*84943d6fSEmmanuel Vadot          $ref: /schemas/types.yaml#/definitions/flag
291*84943d6fSEmmanuel Vadot          description: Configure the pad into power down mode.
292*84943d6fSEmmanuel Vadot
293*84943d6fSEmmanuel Vadot        low-power-disable:
294*84943d6fSEmmanuel Vadot          $ref: /schemas/types.yaml#/definitions/flag
295*84943d6fSEmmanuel Vadot          description: Configure the pad into active mode.
296*84943d6fSEmmanuel Vadot
297*84943d6fSEmmanuel Vadot        power-source:
298*84943d6fSEmmanuel Vadot          $ref: /schemas/types.yaml#/definitions/uint32
299*84943d6fSEmmanuel Vadot          description: |
300*84943d6fSEmmanuel Vadot            Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or
301*84943d6fSEmmanuel Vadot            TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages. The
302*84943d6fSEmmanuel Vadot            values are defined in:
303*84943d6fSEmmanuel Vadot
304*84943d6fSEmmanuel Vadot              include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
305*84943d6fSEmmanuel Vadot
306*84943d6fSEmmanuel Vadot            Power state can be configured on all Tegra124 and Tegra132 pads.
307*84943d6fSEmmanuel Vadot            None of the Tegra124 or Tegra132 pads support signaling voltage
308*84943d6fSEmmanuel Vadot            switching. All of the listed Tegra210 pads except pex-cntrl support
309*84943d6fSEmmanuel Vadot            power state configuration. Signaling voltage switching is supported
310*84943d6fSEmmanuel Vadot            on the following Tegra210 pads:
311*84943d6fSEmmanuel Vadot
312*84943d6fSEmmanuel Vadot              audio, audio-hv, cam, dbg, dmic, gpio, pex-cntrl, sdmmc1, sdmmc3,
313*84943d6fSEmmanuel Vadot              spi, spi-hv, uart
314*84943d6fSEmmanuel Vadot
315*84943d6fSEmmanuel Vadot      required:
316*84943d6fSEmmanuel Vadot        - pins
317*84943d6fSEmmanuel Vadot
318*84943d6fSEmmanuel Vadotrequired:
319*84943d6fSEmmanuel Vadot  - compatible
320*84943d6fSEmmanuel Vadot  - reg
321*84943d6fSEmmanuel Vadot  - clock-names
322*84943d6fSEmmanuel Vadot  - clocks
323*84943d6fSEmmanuel Vadot  - '#clock-cells'
324*84943d6fSEmmanuel Vadot
325*84943d6fSEmmanuel VadotallOf:
326*84943d6fSEmmanuel Vadot  - if:
327*84943d6fSEmmanuel Vadot      properties:
328*84943d6fSEmmanuel Vadot        compatible:
329*84943d6fSEmmanuel Vadot          contains:
330*84943d6fSEmmanuel Vadot            const: nvidia,tegra124-pmc
331*84943d6fSEmmanuel Vadot    then:
332*84943d6fSEmmanuel Vadot      properties:
333*84943d6fSEmmanuel Vadot        pinmux:
334*84943d6fSEmmanuel Vadot          additionalProperties:
335*84943d6fSEmmanuel Vadot            type: object
336*84943d6fSEmmanuel Vadot            properties:
337*84943d6fSEmmanuel Vadot              pins:
338*84943d6fSEmmanuel Vadot                items:
339*84943d6fSEmmanuel Vadot                  enum: [ audio, bb, cam, comp, csia, csb, cse, dsi, dsib,
340*84943d6fSEmmanuel Vadot                          dsic, dsid, hdmi, hsic, hv, lvds, mipi-bias, nand,
341*84943d6fSEmmanuel Vadot                          pex-bias, pex-clk1, pex-clk2, pex-cntrl, sdmmc1,
342*84943d6fSEmmanuel Vadot                          sdmmc3, sdmmc4, sys_ddc, uart, usb0, usb1, usb2,
343*84943d6fSEmmanuel Vadot                          usb_bias ]
344*84943d6fSEmmanuel Vadot
345*84943d6fSEmmanuel Vadot  - if:
346*84943d6fSEmmanuel Vadot      properties:
347*84943d6fSEmmanuel Vadot        compatible:
348*84943d6fSEmmanuel Vadot          contains:
349*84943d6fSEmmanuel Vadot            const: nvidia,tegra210-pmc
350*84943d6fSEmmanuel Vadot    then:
351*84943d6fSEmmanuel Vadot      properties:
352*84943d6fSEmmanuel Vadot        pinmux:
353*84943d6fSEmmanuel Vadot          additionalProperties:
354*84943d6fSEmmanuel Vadot            type: object
355*84943d6fSEmmanuel Vadot            properties:
356*84943d6fSEmmanuel Vadot              pins:
357*84943d6fSEmmanuel Vadot                items:
358*84943d6fSEmmanuel Vadot                  enum: [ audio, audio-hv, cam, csia, csib, csic, csid, csie,
359*84943d6fSEmmanuel Vadot                          csif, dbg, debug-nonao, dmic, dp, dsi, dsib, dsic,
360*84943d6fSEmmanuel Vadot                          dsid, emmc, emmc2, gpio, hdmi, hsic, lvds, mipi-bias,
361*84943d6fSEmmanuel Vadot                          pex-bias, pex-clk1, pex-clk2, pex-cntrl, sdmmc1,
362*84943d6fSEmmanuel Vadot                          sdmmc3, spi, spi-hv, uart, usb0, usb1, usb2, usb3,
363*84943d6fSEmmanuel Vadot                          usb-bias ]
364*84943d6fSEmmanuel Vadot
365*84943d6fSEmmanuel VadotadditionalProperties: false
366*84943d6fSEmmanuel Vadot
367*84943d6fSEmmanuel Vadotdependencies:
368*84943d6fSEmmanuel Vadot  "nvidia,suspend-mode": ["nvidia,core-pwr-off-time", "nvidia,cpu-pwr-off-time"]
369*84943d6fSEmmanuel Vadot  "nvidia,core-pwr-off-time": ["nvidia,core-pwr-good-time"]
370*84943d6fSEmmanuel Vadot  "nvidia,cpu-pwr-off-time": ["nvidia,cpu-pwr-good-time"]
371*84943d6fSEmmanuel Vadot
372*84943d6fSEmmanuel Vadotexamples:
373*84943d6fSEmmanuel Vadot  - |
374*84943d6fSEmmanuel Vadot    #include <dt-bindings/clock/tegra210-car.h>
375*84943d6fSEmmanuel Vadot    #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
376*84943d6fSEmmanuel Vadot    #include <dt-bindings/soc/tegra-pmc.h>
377*84943d6fSEmmanuel Vadot
378*84943d6fSEmmanuel Vadot    pmc@7000e400 {
379*84943d6fSEmmanuel Vadot        compatible = "nvidia,tegra210-pmc";
380*84943d6fSEmmanuel Vadot        reg = <0x7000e400 0x400>;
381*84943d6fSEmmanuel Vadot        core-supply = <&regulator>;
382*84943d6fSEmmanuel Vadot        clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
383*84943d6fSEmmanuel Vadot        clock-names = "pclk", "clk32k_in";
384*84943d6fSEmmanuel Vadot        #clock-cells = <1>;
385*84943d6fSEmmanuel Vadot
386*84943d6fSEmmanuel Vadot        nvidia,invert-interrupt;
387*84943d6fSEmmanuel Vadot        nvidia,suspend-mode = <0>;
388*84943d6fSEmmanuel Vadot        nvidia,cpu-pwr-good-time = <0>;
389*84943d6fSEmmanuel Vadot        nvidia,cpu-pwr-off-time = <0>;
390*84943d6fSEmmanuel Vadot        nvidia,core-pwr-good-time = <4587 3876>;
391*84943d6fSEmmanuel Vadot        nvidia,core-pwr-off-time = <39065>;
392*84943d6fSEmmanuel Vadot        nvidia,core-power-req-active-high;
393*84943d6fSEmmanuel Vadot        nvidia,sys-clock-req-active-high;
394*84943d6fSEmmanuel Vadot
395*84943d6fSEmmanuel Vadot        pd_core: core-domain {
396*84943d6fSEmmanuel Vadot            operating-points-v2 = <&core_opp_table>;
397*84943d6fSEmmanuel Vadot            #power-domain-cells = <0>;
398*84943d6fSEmmanuel Vadot        };
399*84943d6fSEmmanuel Vadot
400*84943d6fSEmmanuel Vadot        powergates {
401*84943d6fSEmmanuel Vadot            pd_audio: aud {
402*84943d6fSEmmanuel Vadot                clocks = <&tegra_car TEGRA210_CLK_APE>,
403*84943d6fSEmmanuel Vadot                         <&tegra_car TEGRA210_CLK_APB2APE>;
404*84943d6fSEmmanuel Vadot                resets = <&tegra_car 198>;
405*84943d6fSEmmanuel Vadot                power-domains = <&pd_core>;
406*84943d6fSEmmanuel Vadot                #power-domain-cells = <0>;
407*84943d6fSEmmanuel Vadot            };
408*84943d6fSEmmanuel Vadot
409*84943d6fSEmmanuel Vadot            pd_xusbss: xusba {
410*84943d6fSEmmanuel Vadot                clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>;
411*84943d6fSEmmanuel Vadot                resets = <&tegra_car TEGRA210_CLK_XUSB_SS>;
412*84943d6fSEmmanuel Vadot                power-domains = <&pd_core>;
413*84943d6fSEmmanuel Vadot                #power-domain-cells = <0>;
414*84943d6fSEmmanuel Vadot            };
415*84943d6fSEmmanuel Vadot        };
416*84943d6fSEmmanuel Vadot    };
417