xref: /freebsd/sys/contrib/device-tree/Bindings/soc/socionext/socionext,uniphier-sdctrl.yaml (revision fac71e4e09885bb2afa3d984a0c239a52e1a7418) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sdctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext UniPhier SD interface logic
8
9maintainers:
10  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
11
12description: |+
13  SD interface logic implemented on Socionext UniPhier SoCs is
14  attached outside SDHC, and has some SD related functions such as
15  clock control, reset control, mode switch, and so on.
16
17properties:
18  compatible:
19    items:
20      - enum:
21          - socionext,uniphier-pro5-sdctrl
22          - socionext,uniphier-pxs2-sdctrl
23          - socionext,uniphier-ld11-sdctrl
24          - socionext,uniphier-ld20-sdctrl
25          - socionext,uniphier-pxs3-sdctrl
26          - socionext,uniphier-nx1-sdctrl
27      - const: simple-mfd
28      - const: syscon
29
30  reg:
31    maxItems: 1
32
33  clock-controller:
34    $ref: /schemas/clock/socionext,uniphier-clock.yaml#
35
36  reset-controller:
37    $ref: /schemas/reset/socionext,uniphier-reset.yaml#
38
39required:
40  - compatible
41  - reg
42
43additionalProperties: false
44
45examples:
46  - |
47    syscon@59810000 {
48        compatible = "socionext,uniphier-ld20-sdctrl",
49                     "simple-mfd", "syscon";
50        reg = <0x59810000 0x400>;
51
52        clock-controller {
53            compatible = "socionext,uniphier-ld20-sd-clock";
54            #clock-cells = <1>;
55        };
56
57        reset-controller {
58            compatible = "socionext,uniphier-ld20-sd-reset";
59            #reset-cells = <1>;
60        };
61    };
62