xref: /freebsd/sys/contrib/device-tree/Bindings/soc/qcom/qcom,aoss-qmp.yaml (revision 354d7675fe12ace9cde344cb79c7ded792802f88) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Always-On Subsystem side channel binding
8
9maintainers:
10  - Bjorn Andersson <bjorn.andersson@linaro.org>
11
12description:
13  This binding describes the hardware component responsible for side channel
14  requests to the always-on subsystem (AOSS), used for certain power management
15  requests that is not handled by the standard RPMh interface. Each client in the
16  SoC has it's own block of message RAM and IRQ for communication with the AOSS.
17  The protocol used to communicate in the message RAM is known as Qualcomm
18  Messaging Protocol (QMP)
19
20  The AOSS side channel exposes control over a set of resources, used to control
21  a set of debug related clocks and to affect the low power state of resources
22  related to the secondary subsystems. These resources are exposed as a set of
23  power-domains.
24
25properties:
26  compatible:
27    items:
28      - enum:
29          - qcom,sc7180-aoss-qmp
30          - qcom,sc7280-aoss-qmp
31          - qcom,sc8180x-aoss-qmp
32          - qcom,sdm845-aoss-qmp
33          - qcom,sm8150-aoss-qmp
34          - qcom,sm8250-aoss-qmp
35          - qcom,sm8350-aoss-qmp
36      - const: qcom,aoss-qmp
37
38  reg:
39    maxItems: 1
40    description:
41      The base address and size of the message RAM for this client's
42      communication with the AOSS
43
44  interrupts:
45    maxItems: 1
46    description:
47      Should specify the AOSS message IRQ for this client
48
49  mboxes:
50    maxItems: 1
51    description:
52      Reference to the mailbox representing the outgoing doorbell in APCS for
53      this client, as described in mailbox/mailbox.txt
54
55  "#clock-cells":
56    const: 0
57    description:
58      The single clock represents the QDSS clock.
59
60  "#power-domain-cells":
61    const: 1
62    description: |
63        The provided power-domains are:
64        CDSP state (0), LPASS state (1), modem state (2), SLPI
65        state (3), SPSS state (4) and Venus state (5).
66
67required:
68  - compatible
69  - reg
70  - interrupts
71  - mboxes
72  - "#clock-cells"
73
74additionalProperties: false
75
76patternProperties:
77  "^(cx|mx|ebi)$":
78    type: object
79    description:
80      The AOSS side channel also provides the controls for three cooling devices,
81      these are expressed as subnodes of the QMP node. The name of the node is
82      used to identify the resource and must therefor be "cx", "mx" or "ebi".
83
84    properties:
85      "#cooling-cells":
86        const: 2
87
88    required:
89      - "#cooling-cells"
90
91    additionalProperties: false
92
93examples:
94  - |
95    #include <dt-bindings/interrupt-controller/arm-gic.h>
96
97    aoss_qmp: qmp@c300000 {
98      compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
99      reg = <0x0c300000 0x100000>;
100      interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
101      mboxes = <&apss_shared 0>;
102
103      #clock-cells = <0>;
104      #power-domain-cells = <1>;
105
106      cx_cdev: cx {
107        #cooling-cells = <2>;
108      };
109
110      mx_cdev: mx {
111        #cooling-cells = <2>;
112      };
113    };
114...
115