xref: /freebsd/sys/contrib/device-tree/Bindings/soc/mediatek/mediatek,wdma.yaml (revision 7ef62cebc2f965b0f640263e179276928885e33d)
1*7ef62cebSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*7ef62cebSEmmanuel Vadot%YAML 1.2
3*7ef62cebSEmmanuel Vadot---
4*7ef62cebSEmmanuel Vadot$id: http://devicetree.org/schemas/soc/mediatek/mediatek,wdma.yaml#
5*7ef62cebSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*7ef62cebSEmmanuel Vadot
7*7ef62cebSEmmanuel Vadottitle: MediaTek Write Direct Memory Access
8*7ef62cebSEmmanuel Vadot
9*7ef62cebSEmmanuel Vadotmaintainers:
10*7ef62cebSEmmanuel Vadot  - Matthias Brugger <matthias.bgg@gmail.com>
11*7ef62cebSEmmanuel Vadot  - Moudy Ho <moudy.ho@mediatek.com>
12*7ef62cebSEmmanuel Vadot
13*7ef62cebSEmmanuel Vadotdescription: |
14*7ef62cebSEmmanuel Vadot  MediaTek Write Direct Memory Access(WDMA) component used to write
15*7ef62cebSEmmanuel Vadot  the data into DMA.
16*7ef62cebSEmmanuel Vadot
17*7ef62cebSEmmanuel Vadotproperties:
18*7ef62cebSEmmanuel Vadot  compatible:
19*7ef62cebSEmmanuel Vadot    items:
20*7ef62cebSEmmanuel Vadot      - enum:
21*7ef62cebSEmmanuel Vadot          - mediatek,mt8183-mdp3-wdma
22*7ef62cebSEmmanuel Vadot
23*7ef62cebSEmmanuel Vadot  reg:
24*7ef62cebSEmmanuel Vadot    maxItems: 1
25*7ef62cebSEmmanuel Vadot
26*7ef62cebSEmmanuel Vadot  mediatek,gce-client-reg:
27*7ef62cebSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/phandle-array
28*7ef62cebSEmmanuel Vadot    items:
29*7ef62cebSEmmanuel Vadot      items:
30*7ef62cebSEmmanuel Vadot        - description: phandle of GCE
31*7ef62cebSEmmanuel Vadot        - description: GCE subsys id
32*7ef62cebSEmmanuel Vadot        - description: register offset
33*7ef62cebSEmmanuel Vadot        - description: register size
34*7ef62cebSEmmanuel Vadot    description: The register of client driver can be configured by gce with
35*7ef62cebSEmmanuel Vadot      4 arguments defined in this property. Each GCE subsys id is mapping to
36*7ef62cebSEmmanuel Vadot      a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
37*7ef62cebSEmmanuel Vadot
38*7ef62cebSEmmanuel Vadot  mediatek,gce-events:
39*7ef62cebSEmmanuel Vadot    description:
40*7ef62cebSEmmanuel Vadot      The event id which is mapping to the specific hardware event signal
41*7ef62cebSEmmanuel Vadot      to gce. The event id is defined in the gce header
42*7ef62cebSEmmanuel Vadot      include/dt-bindings/gce/<chip>-gce.h of each chips.
43*7ef62cebSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32-array
44*7ef62cebSEmmanuel Vadot
45*7ef62cebSEmmanuel Vadot  power-domains:
46*7ef62cebSEmmanuel Vadot    maxItems: 1
47*7ef62cebSEmmanuel Vadot
48*7ef62cebSEmmanuel Vadot  clocks:
49*7ef62cebSEmmanuel Vadot    minItems: 1
50*7ef62cebSEmmanuel Vadot
51*7ef62cebSEmmanuel Vadot  iommus:
52*7ef62cebSEmmanuel Vadot    maxItems: 1
53*7ef62cebSEmmanuel Vadot
54*7ef62cebSEmmanuel Vadotrequired:
55*7ef62cebSEmmanuel Vadot  - compatible
56*7ef62cebSEmmanuel Vadot  - reg
57*7ef62cebSEmmanuel Vadot  - mediatek,gce-client-reg
58*7ef62cebSEmmanuel Vadot  - mediatek,gce-events
59*7ef62cebSEmmanuel Vadot  - power-domains
60*7ef62cebSEmmanuel Vadot  - clocks
61*7ef62cebSEmmanuel Vadot  - iommus
62*7ef62cebSEmmanuel Vadot
63*7ef62cebSEmmanuel VadotadditionalProperties: false
64*7ef62cebSEmmanuel Vadot
65*7ef62cebSEmmanuel Vadotexamples:
66*7ef62cebSEmmanuel Vadot  - |
67*7ef62cebSEmmanuel Vadot    #include <dt-bindings/clock/mt8183-clk.h>
68*7ef62cebSEmmanuel Vadot    #include <dt-bindings/gce/mt8183-gce.h>
69*7ef62cebSEmmanuel Vadot    #include <dt-bindings/power/mt8183-power.h>
70*7ef62cebSEmmanuel Vadot    #include <dt-bindings/memory/mt8183-larb-port.h>
71*7ef62cebSEmmanuel Vadot
72*7ef62cebSEmmanuel Vadot    mdp3_wdma: mdp3-wdma@14006000 {
73*7ef62cebSEmmanuel Vadot      compatible = "mediatek,mt8183-mdp3-wdma";
74*7ef62cebSEmmanuel Vadot      reg = <0x14006000 0x1000>;
75*7ef62cebSEmmanuel Vadot      mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>;
76*7ef62cebSEmmanuel Vadot      mediatek,gce-events = <CMDQ_EVENT_MDP_WDMA0_SOF>,
77*7ef62cebSEmmanuel Vadot                            <CMDQ_EVENT_MDP_WDMA0_EOF>;
78*7ef62cebSEmmanuel Vadot      power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
79*7ef62cebSEmmanuel Vadot      clocks = <&mmsys CLK_MM_MDP_WDMA0>;
80*7ef62cebSEmmanuel Vadot      iommus = <&iommu>;
81*7ef62cebSEmmanuel Vadot    };
82