1d5b0e70fSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2d5b0e70fSEmmanuel Vadot# Copyright (C) 2022, Intel Corporation 3d5b0e70fSEmmanuel Vadot%YAML 1.2 4d5b0e70fSEmmanuel Vadot--- 5*aa1a8ff2SEmmanuel Vadot$id: http://devicetree.org/schemas/soc/intel/intel,hps-copy-engine.yaml# 6*aa1a8ff2SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 7d5b0e70fSEmmanuel Vadot 8d5b0e70fSEmmanuel Vadottitle: Intel HPS Copy Engine 9d5b0e70fSEmmanuel Vadot 10d5b0e70fSEmmanuel Vadotmaintainers: 11d5b0e70fSEmmanuel Vadot - Matthew Gerlach <matthew.gerlach@linux.intel.com> 12d5b0e70fSEmmanuel Vadot 13d5b0e70fSEmmanuel Vadotdescription: | 14d5b0e70fSEmmanuel Vadot The Intel Hard Processor System (HPS) Copy Engine is an IP block used to copy 15d5b0e70fSEmmanuel Vadot a bootable image from host memory to HPS DDR. Additionally, there is a 16d5b0e70fSEmmanuel Vadot register the HPS can use to indicate the state of booting the copied image as 17d5b0e70fSEmmanuel Vadot well as a keep-a-live indication to the host. 18d5b0e70fSEmmanuel Vadot 19d5b0e70fSEmmanuel Vadotproperties: 20d5b0e70fSEmmanuel Vadot compatible: 21d5b0e70fSEmmanuel Vadot const: intel,hps-copy-engine 22d5b0e70fSEmmanuel Vadot 23d5b0e70fSEmmanuel Vadot '#dma-cells': 24d5b0e70fSEmmanuel Vadot const: 1 25d5b0e70fSEmmanuel Vadot 26d5b0e70fSEmmanuel Vadot reg: 27d5b0e70fSEmmanuel Vadot maxItems: 1 28d5b0e70fSEmmanuel Vadot 29d5b0e70fSEmmanuel Vadotrequired: 30d5b0e70fSEmmanuel Vadot - compatible 31d5b0e70fSEmmanuel Vadot - reg 32d5b0e70fSEmmanuel Vadot 33d5b0e70fSEmmanuel VadotadditionalProperties: false 34d5b0e70fSEmmanuel Vadot 35d5b0e70fSEmmanuel Vadotexamples: 36d5b0e70fSEmmanuel Vadot - | 37d5b0e70fSEmmanuel Vadot bus@80000000 { 38d5b0e70fSEmmanuel Vadot compatible = "simple-bus"; 39d5b0e70fSEmmanuel Vadot reg = <0x80000000 0x60000000>, 40d5b0e70fSEmmanuel Vadot <0xf9000000 0x00100000>; 41d5b0e70fSEmmanuel Vadot reg-names = "axi_h2f", "axi_h2f_lw"; 42d5b0e70fSEmmanuel Vadot #address-cells = <2>; 43d5b0e70fSEmmanuel Vadot #size-cells = <1>; 44d5b0e70fSEmmanuel Vadot ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>; 45d5b0e70fSEmmanuel Vadot 46d5b0e70fSEmmanuel Vadot dma-controller@0 { 47d5b0e70fSEmmanuel Vadot compatible = "intel,hps-copy-engine"; 48d5b0e70fSEmmanuel Vadot reg = <0x00000000 0x00000000 0x00001000>; 49d5b0e70fSEmmanuel Vadot #dma-cells = <1>; 50d5b0e70fSEmmanuel Vadot }; 51d5b0e70fSEmmanuel Vadot }; 52