1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NXP i.MX93 Media blk-ctrl 8 9maintainers: 10 - Peng Fan <peng.fan@nxp.com> 11 12description: 13 The i.MX93 MEDIAMIX domain contains control and status registers known 14 as MEDIAMIX Block Control (MEDIAMIX BLK_CTRL). These registers include 15 clocking, reset, and miscellaneous top-level controls for peripherals 16 within the MEDIAMIX domain 17 18properties: 19 compatible: 20 items: 21 - const: fsl,imx93-media-blk-ctrl 22 - const: syscon 23 24 reg: 25 maxItems: 1 26 27 '#power-domain-cells': 28 const: 1 29 30 power-domains: 31 maxItems: 1 32 33 clocks: 34 maxItems: 10 35 36 clock-names: 37 items: 38 - const: apb 39 - const: axi 40 - const: nic 41 - const: disp 42 - const: cam 43 - const: pxp 44 - const: lcdif 45 - const: isi 46 - const: csi 47 - const: dsi 48 49required: 50 - compatible 51 - reg 52 - power-domains 53 - clocks 54 - clock-names 55 56additionalProperties: false 57 58examples: 59 - | 60 #include <dt-bindings/clock/imx93-clock.h> 61 #include <dt-bindings/power/fsl,imx93-power.h> 62 63 system-controller@4ac10000 { 64 compatible = "fsl,imx93-media-blk-ctrl", "syscon"; 65 reg = <0x4ac10000 0x10000>; 66 power-domains = <&mediamix>; 67 clocks = <&clk IMX93_CLK_MEDIA_APB>, 68 <&clk IMX93_CLK_MEDIA_AXI>, 69 <&clk IMX93_CLK_NIC_MEDIA_GATE>, 70 <&clk IMX93_CLK_MEDIA_DISP_PIX>, 71 <&clk IMX93_CLK_CAM_PIX>, 72 <&clk IMX93_CLK_PXP_GATE>, 73 <&clk IMX93_CLK_LCDIF_GATE>, 74 <&clk IMX93_CLK_ISI_GATE>, 75 <&clk IMX93_CLK_MIPI_CSI_GATE>, 76 <&clk IMX93_CLK_MIPI_DSI_GATE>; 77 clock-names = "apb", "axi", "nic", "disp", "cam", 78 "pxp", "lcdif", "isi", "csi", "dsi"; 79 #power-domain-cells = <1>; 80 }; 81