1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Amlogic Meson System Control registers 8 9maintainers: 10 - Neil Armstrong <neil.armstrong@linaro.org> 11 12properties: 13 compatible: 14 items: 15 - enum: 16 - amlogic,meson-gx-hhi-sysctrl 17 - amlogic,meson-gx-ao-sysctrl 18 - amlogic,meson-axg-hhi-sysctrl 19 - amlogic,meson-axg-ao-sysctrl 20 - const: simple-mfd 21 - const: syscon 22 23 reg: 24 maxItems: 1 25 26 clock-controller: 27 type: object 28 29 power-controller: 30 $ref: /schemas/power/amlogic,meson-ee-pwrc.yaml 31 32 pinctrl: 33 type: object 34 35 phy: 36 type: object 37 38allOf: 39 - if: 40 properties: 41 compatible: 42 enum: 43 - amlogic,meson-gx-hhi-sysctrl 44 - amlogic,meson-axg-hhi-sysctrl 45 then: 46 properties: 47 clock-controller: 48 $ref: /schemas/clock/amlogic,gxbb-clkc.yaml# 49 50 required: 51 - power-controller 52 53 - if: 54 properties: 55 compatible: 56 enum: 57 - amlogic,meson-gx-ao-sysctrl 58 - amlogic,meson-axg-ao-sysctrl 59 then: 60 properties: 61 clock-controller: 62 $ref: /schemas/clock/amlogic,gxbb-aoclkc.yaml# 63 64 power-controller: false 65 phy: false 66 67 - if: 68 properties: 69 compatible: 70 enum: 71 - amlogic,meson-gx-hhi-sysctrl 72 then: 73 properties: 74 phy: false 75 76 - if: 77 properties: 78 compatible: 79 enum: 80 - amlogic,meson-axg-hhi-sysctrl 81 then: 82 properties: 83 phy: 84 oneOf: 85 - $ref: /schemas/phy/amlogic,g12a-mipi-dphy-analog.yaml 86 - $ref: /schemas/phy/amlogic,meson-axg-mipi-pcie-analog.yaml 87 88required: 89 - compatible 90 - reg 91 - clock-controller 92 93additionalProperties: false 94 95examples: 96 - | 97 bus@c883c000 { 98 compatible = "simple-bus"; 99 reg = <0xc883c000 0x2000>; 100 #address-cells = <1>; 101 #size-cells = <1>; 102 ranges = <0x0 0xc883c000 0x2000>; 103 104 sysctrl: system-controller@0 { 105 compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"; 106 reg = <0 0x400>; 107 108 clock-controller { 109 compatible = "amlogic,gxbb-clkc"; 110 #clock-cells = <1>; 111 clocks = <&xtal>; 112 clock-names = "xtal"; 113 }; 114 115 power-controller { 116 compatible = "amlogic,meson-gxbb-pwrc"; 117 #power-domain-cells = <1>; 118 amlogic,ao-sysctrl = <&sysctrl_AO>; 119 120 resets = <&reset_viu>, 121 <&reset_venc>, 122 <&reset_vcbus>, 123 <&reset_bt656>, 124 <&reset_dvin>, 125 <&reset_rdma>, 126 <&reset_venci>, 127 <&reset_vencp>, 128 <&reset_vdac>, 129 <&reset_vdi6>, 130 <&reset_vencl>, 131 <&reset_vid_lock>; 132 reset-names = "viu", "venc", "vcbus", "bt656", "dvin", 133 "rdma", "venci", "vencp", "vdac", "vdi6", 134 "vencl", "vid_lock"; 135 clocks = <&clk_vpu>, <&clk_vapb>; 136 clock-names = "vpu", "vapb"; 137 }; 138 }; 139 }; 140 141 bus@c8100000 { 142 compatible = "simple-bus"; 143 reg = <0xc8100000 0x100000>; 144 #address-cells = <1>; 145 #size-cells = <1>; 146 ranges = <0x0 0xc8100000 0x100000>; 147 148 sysctrl_AO: system-controller@0 { 149 compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon"; 150 reg = <0 0x100>; 151 152 clock-controller { 153 compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc"; 154 #clock-cells = <1>; 155 #reset-cells = <1>; 156 clocks = <&xtal>, <&clk81>; 157 clock-names = "xtal", "mpeg-clk"; 158 }; 159 }; 160 }; 161 162 - | 163 system-controller@ff63c000 { 164 compatible = "amlogic,meson-axg-hhi-sysctrl", "simple-mfd", "syscon"; 165 reg = <0xff63c000 0x400>; 166 167 clock-controller { 168 compatible = "amlogic,axg-clkc"; 169 #clock-cells = <1>; 170 clocks = <&xtal>; 171 clock-names = "xtal"; 172 }; 173 174 power-controller { 175 compatible = "amlogic,meson-axg-pwrc"; 176 #power-domain-cells = <1>; 177 amlogic,ao-sysctrl = <&sysctrl_AO>; 178 179 resets = <&reset_viu>, 180 <&reset_venc>, 181 <&reset_vcbus>, 182 <&reset_vencl>, 183 <&reset_vid_lock>; 184 reset-names = "viu", "venc", "vcbus", "vencl", "vid_lock"; 185 clocks = <&clk_vpu>, <&clk_vapb>; 186 clock-names = "vpu", "vapb"; 187 }; 188 189 phy { 190 compatible = "amlogic,axg-mipi-pcie-analog-phy"; 191 #phy-cells = <0>; 192 }; 193 }; 194