1*c66ec88fSEmmanuel VadotXilinx Axi Uartlite controller Device Tree Bindings 2*c66ec88fSEmmanuel Vadot--------------------------------------------------------- 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotRequired properties: 5*c66ec88fSEmmanuel Vadot- compatible : Can be either of 6*c66ec88fSEmmanuel Vadot "xlnx,xps-uartlite-1.00.a" 7*c66ec88fSEmmanuel Vadot "xlnx,opb-uartlite-1.00.b" 8*c66ec88fSEmmanuel Vadot- reg : Physical base address and size of the Axi Uartlite 9*c66ec88fSEmmanuel Vadot registers map. 10*c66ec88fSEmmanuel Vadot- interrupts : Should contain the UART controller interrupt. 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel VadotOptional properties: 13*c66ec88fSEmmanuel Vadot- port-number : Set Uart port number 14*c66ec88fSEmmanuel Vadot- clock-names : Should be "s_axi_aclk" 15*c66ec88fSEmmanuel Vadot- clocks : Input clock specifier. Refer to common clock bindings. 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel VadotExample: 18*c66ec88fSEmmanuel Vadotserial@800c0000 { 19*c66ec88fSEmmanuel Vadot compatible = "xlnx,xps-uartlite-1.00.a"; 20*c66ec88fSEmmanuel Vadot reg = <0x0 0x800c0000 0x10000>; 21*c66ec88fSEmmanuel Vadot interrupts = <0x0 0x6e 0x1>; 22*c66ec88fSEmmanuel Vadot port-number = <0>; 23*c66ec88fSEmmanuel Vadot}; 24