xref: /freebsd/sys/contrib/device-tree/Bindings/serial/renesas,scif.yaml (revision 924226fba12cc9a228c73b956e1b7fa24c60b055) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/serial/renesas,scif.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Renesas Serial Communication Interface with FIFO (SCIF)
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12allOf:
13  - $ref: serial.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - renesas,scif-r7s72100     # RZ/A1H
21          - const: renesas,scif           # generic SCIF compatible UART
22
23      - items:
24          - enum:
25              - renesas,scif-r7s9210      # RZ/A2
26
27      - items:
28          - enum:
29              - renesas,scif-r8a7778      # R-Car M1
30              - renesas,scif-r8a7779      # R-Car H1
31          - const: renesas,rcar-gen1-scif # R-Car Gen1
32          - const: renesas,scif           # generic SCIF compatible UART
33
34      - items:
35          - enum:
36              - renesas,scif-r8a7742      # RZ/G1H
37              - renesas,scif-r8a7743      # RZ/G1M
38              - renesas,scif-r8a7744      # RZ/G1N
39              - renesas,scif-r8a7745      # RZ/G1E
40              - renesas,scif-r8a77470     # RZ/G1C
41              - renesas,scif-r8a7790      # R-Car H2
42              - renesas,scif-r8a7791      # R-Car M2-W
43              - renesas,scif-r8a7792      # R-Car V2H
44              - renesas,scif-r8a7793      # R-Car M2-N
45              - renesas,scif-r8a7794      # R-Car E2
46          - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
47          - const: renesas,scif           # generic SCIF compatible UART
48
49      - items:
50          - enum:
51              - renesas,scif-r8a774a1     # RZ/G2M
52              - renesas,scif-r8a774b1     # RZ/G2N
53              - renesas,scif-r8a774c0     # RZ/G2E
54              - renesas,scif-r8a774e1     # RZ/G2H
55              - renesas,scif-r8a7795      # R-Car H3
56              - renesas,scif-r8a7796      # R-Car M3-W
57              - renesas,scif-r8a77961     # R-Car M3-W+
58              - renesas,scif-r8a77965     # R-Car M3-N
59              - renesas,scif-r8a77970     # R-Car V3M
60              - renesas,scif-r8a77980     # R-Car V3H
61              - renesas,scif-r8a77990     # R-Car E3
62              - renesas,scif-r8a77995     # R-Car D3
63              - renesas,scif-r8a779a0     # R-Car V3U
64          - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
65          - const: renesas,scif           # generic SCIF compatible UART
66
67  reg:
68    maxItems: 1
69
70  interrupts:
71    oneOf:
72      - items:
73          - description: A combined interrupt
74      - items:
75          - description: Error interrupt
76          - description: Receive buffer full interrupt
77          - description: Transmit buffer empty interrupt
78          - description: Transmit End interrupt
79      - items:
80          - description: Error interrupt
81          - description: Receive buffer full interrupt
82          - description: Transmit buffer empty interrupt
83          - description: Break interrupt
84          - description: Data Ready interrupt
85          - description: Transmit End interrupt
86
87  interrupt-names:
88    oneOf:
89      - items:
90          - const: eri
91          - const: rxi
92          - const: txi
93          - const: tei
94      - items:
95          - const: eri
96          - const: rxi
97          - const: txi
98          - const: bri
99          - const: dri
100          - const: tei
101
102  clocks:
103    minItems: 1
104    maxItems: 4
105
106  clock-names:
107    minItems: 1
108    maxItems: 4
109    items:
110      enum:
111        - fck # UART functional clock
112        - sck # optional external clock input
113        - brg_int # optional internal clock source for BRG frequency divider
114        - scif_clk # optional external clock source for BRG frequency divider
115
116  power-domains:
117    maxItems: 1
118
119  resets:
120    maxItems: 1
121
122  dmas:
123    minItems: 2
124    maxItems: 4
125    description:
126      Must contain a list of pairs of references to DMA specifiers, one for
127      transmission, and one for reception.
128
129  dma-names:
130    minItems: 2
131    maxItems: 4
132    items:
133      enum:
134        - tx
135        - rx
136
137required:
138  - compatible
139  - reg
140  - interrupts
141  - clocks
142  - clock-names
143  - power-domains
144
145if:
146  properties:
147    compatible:
148      contains:
149        enum:
150          - renesas,rcar-gen2-scif
151          - renesas,rcar-gen3-scif
152then:
153  required:
154    - resets
155
156unevaluatedProperties: false
157
158examples:
159  - |
160    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
161    #include <dt-bindings/interrupt-controller/arm-gic.h>
162    #include <dt-bindings/power/r8a7791-sysc.h>
163    aliases {
164            serial0 = &scif0;
165    };
166
167    scif0: serial@e6e60000 {
168            compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
169                         "renesas,scif";
170            reg = <0xe6e60000 64>;
171            interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
172            clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
173                     <&scif_clk>;
174            clock-names = "fck", "brg_int", "scif_clk";
175            dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>;
176            dma-names = "tx", "rx", "tx", "rx";
177            power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
178            resets = <&cpg 721>;
179    };
180