xref: /freebsd/sys/contrib/device-tree/Bindings/serial/renesas,scif.yaml (revision 56b17de1e8360fe131d425de20b5e75ff3ea897c) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/renesas,scif.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Serial Communication Interface with FIFO (SCIF)
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12allOf:
13  - $ref: serial.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - renesas,scif-r7s72100     # RZ/A1H
21          - const: renesas,scif           # generic SCIF compatible UART
22
23      - items:
24          - enum:
25              - renesas,scif-r7s9210      # RZ/A2
26
27      - items:
28          - enum:
29              - renesas,scif-r8a7778      # R-Car M1
30              - renesas,scif-r8a7779      # R-Car H1
31          - const: renesas,rcar-gen1-scif # R-Car Gen1
32          - const: renesas,scif           # generic SCIF compatible UART
33
34      - items:
35          - enum:
36              - renesas,scif-r8a7742      # RZ/G1H
37              - renesas,scif-r8a7743      # RZ/G1M
38              - renesas,scif-r8a7744      # RZ/G1N
39              - renesas,scif-r8a7745      # RZ/G1E
40              - renesas,scif-r8a77470     # RZ/G1C
41              - renesas,scif-r8a7790      # R-Car H2
42              - renesas,scif-r8a7791      # R-Car M2-W
43              - renesas,scif-r8a7792      # R-Car V2H
44              - renesas,scif-r8a7793      # R-Car M2-N
45              - renesas,scif-r8a7794      # R-Car E2
46          - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
47          - const: renesas,scif           # generic SCIF compatible UART
48
49      - items:
50          - enum:
51              - renesas,scif-r8a774a1     # RZ/G2M
52              - renesas,scif-r8a774b1     # RZ/G2N
53              - renesas,scif-r8a774c0     # RZ/G2E
54              - renesas,scif-r8a774e1     # RZ/G2H
55              - renesas,scif-r8a7795      # R-Car H3
56              - renesas,scif-r8a7796      # R-Car M3-W
57              - renesas,scif-r8a77961     # R-Car M3-W+
58              - renesas,scif-r8a77965     # R-Car M3-N
59              - renesas,scif-r8a77970     # R-Car V3M
60              - renesas,scif-r8a77980     # R-Car V3H
61              - renesas,scif-r8a77990     # R-Car E3
62              - renesas,scif-r8a77995     # R-Car D3
63          - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
64          - const: renesas,scif           # generic SCIF compatible UART
65
66      - items:
67          - enum:
68              - renesas,scif-r8a779a0     # R-Car V3U
69              - renesas,scif-r8a779f0     # R-Car S4-8
70              - renesas,scif-r8a779g0     # R-Car V4H
71          - const: renesas,rcar-gen4-scif # R-Car Gen4
72          - const: renesas,scif           # generic SCIF compatible UART
73
74      - items:
75          - enum:
76              - renesas,scif-r9a07g044      # RZ/G2{L,LC}
77
78      - items:
79          - enum:
80              - renesas,scif-r9a07g043      # RZ/G2UL and RZ/Five
81              - renesas,scif-r9a07g054      # RZ/V2L
82              - renesas,scif-r9a08g045      # RZ/G3S
83          - const: renesas,scif-r9a07g044   # RZ/G2{L,LC} fallback
84
85  reg:
86    maxItems: 1
87
88  interrupts:
89    oneOf:
90      - items:
91          - description: A combined interrupt
92      - items:
93          - description: Error interrupt
94          - description: Receive buffer full interrupt
95          - description: Transmit buffer empty interrupt
96          - description: Break interrupt
97      - items:
98          - description: Error interrupt
99          - description: Receive buffer full interrupt
100          - description: Transmit buffer empty interrupt
101          - description: Break interrupt
102          - description: Data Ready interrupt
103          - description: Transmit End interrupt
104
105  interrupt-names:
106    oneOf:
107      - items:
108          - const: eri
109          - const: rxi
110          - const: txi
111          - const: bri
112      - items:
113          - const: eri
114          - const: rxi
115          - const: txi
116          - const: bri
117          - const: dri
118          - const: tei
119
120  clocks:
121    minItems: 1
122    maxItems: 4
123
124  clock-names:
125    minItems: 1
126    maxItems: 4
127    items:
128      enum:
129        - fck # UART functional clock
130        - sck # optional external clock input
131        - brg_int # optional internal clock source for BRG frequency divider
132        - scif_clk # optional external clock source for BRG frequency divider
133
134  power-domains:
135    maxItems: 1
136
137  resets:
138    maxItems: 1
139
140  dmas:
141    minItems: 2
142    maxItems: 4
143    description:
144      Must contain a list of pairs of references to DMA specifiers, one for
145      transmission, and one for reception.
146
147  dma-names:
148    minItems: 2
149    maxItems: 4
150    items:
151      enum:
152        - tx
153        - rx
154
155required:
156  - compatible
157  - reg
158  - interrupts
159  - clocks
160  - clock-names
161  - power-domains
162
163if:
164  properties:
165    compatible:
166      contains:
167        enum:
168          - renesas,rcar-gen2-scif
169          - renesas,rcar-gen3-scif
170          - renesas,rcar-gen4-scif
171          - renesas,scif-r9a07g044
172then:
173  required:
174    - resets
175
176unevaluatedProperties: false
177
178examples:
179  - |
180    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
181    #include <dt-bindings/interrupt-controller/arm-gic.h>
182    #include <dt-bindings/power/r8a7791-sysc.h>
183    aliases {
184        serial0 = &scif0;
185    };
186
187    scif0: serial@e6e60000 {
188        compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
189                     "renesas,scif";
190        reg = <0xe6e60000 64>;
191        interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
192        clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
193                 <&scif_clk>;
194        clock-names = "fck", "brg_int", "scif_clk";
195        dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>;
196        dma-names = "tx", "rx", "tx", "rx";
197        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
198        resets = <&cpg 721>;
199    };
200