xref: /freebsd/sys/contrib/device-tree/Bindings/serial/mediatek,uart.yaml (revision aa1a8ff2d6dbc51ef058f46f3db5a8bb77967145) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)
8
9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12allOf:
13  - $ref: serial.yaml#
14
15description: |
16  The MediaTek UART is based on the basic 8250 UART and compatible
17  with 16550A, with enhancements for high speed baud rates and
18  support for DMA.
19
20properties:
21  compatible:
22    oneOf:
23      - const: mediatek,mt6577-uart
24      - items:
25          - enum:
26              - mediatek,mt2701-uart
27              - mediatek,mt2712-uart
28              - mediatek,mt6580-uart
29              - mediatek,mt6582-uart
30              - mediatek,mt6589-uart
31              - mediatek,mt6755-uart
32              - mediatek,mt6765-uart
33              - mediatek,mt6779-uart
34              - mediatek,mt6795-uart
35              - mediatek,mt6797-uart
36              - mediatek,mt7622-uart
37              - mediatek,mt7623-uart
38              - mediatek,mt7629-uart
39              - mediatek,mt7986-uart
40              - mediatek,mt8127-uart
41              - mediatek,mt8135-uart
42              - mediatek,mt8173-uart
43              - mediatek,mt8183-uart
44              - mediatek,mt8186-uart
45              - mediatek,mt8188-uart
46              - mediatek,mt8192-uart
47              - mediatek,mt8195-uart
48              - mediatek,mt8365-uart
49              - mediatek,mt8516-uart
50          - const: mediatek,mt6577-uart
51
52  reg:
53    description: The base address of the UART register bank
54    maxItems: 1
55
56  clocks:
57    minItems: 1
58    items:
59      - description: The clock the baudrate is derived from
60      - description: The bus clock for register accesses
61
62  clock-names:
63    minItems: 1
64    items:
65      - const: baud
66      - const: bus
67
68  dmas:
69    items:
70      - description: phandle to TX DMA
71      - description: phandle to RX DMA
72
73  dma-names:
74    items:
75      - const: tx
76      - const: rx
77
78  interrupts:
79    minItems: 1
80    maxItems: 2
81
82  interrupt-names:
83    description:
84      The UART interrupt and optionally the RX in-band wakeup interrupt.
85    minItems: 1
86    items:
87      - const: uart
88      - const: wakeup
89
90  pinctrl-0: true
91  pinctrl-1: true
92
93  pinctrl-names:
94    minItems: 1
95    items:
96      - const: default
97      - const: sleep
98
99required:
100  - compatible
101  - reg
102  - clocks
103  - interrupts
104
105unevaluatedProperties: false
106
107examples:
108  - |
109    #include <dt-bindings/interrupt-controller/arm-gic.h>
110
111    serial@11006000 {
112        compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
113        reg = <0x11006000 0x400>;
114        interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
115                     <GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
116        interrupt-names = "uart", "wakeup";
117        clocks = <&uart_clk>, <&bus_clk>;
118        clock-names = "baud", "bus";
119        pinctrl-0 = <&uart_pin>;
120        pinctrl-1 = <&uart_pin_sleep>;
121        pinctrl-names = "default", "sleep";
122    };
123