1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/rtc/xlnx,zynqmp-rtc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock 8 9description: 10 RTC controller for the Xilinx Zynq MPSoC Real Time Clock. 11 The RTC controller has separate IRQ lines for seconds and alarm. 12 13maintainers: 14 - Michal Simek <michal.simek@xilinx.com> 15 16allOf: 17 - $ref: rtc.yaml# 18 19properties: 20 compatible: 21 const: xlnx,zynqmp-rtc 22 23 reg: 24 maxItems: 1 25 26 interrupts: 27 minItems: 2 28 29 interrupt-names: 30 items: 31 - const: alarm 32 - const: sec 33 34 calibration: 35 description: | 36 calibration value for 1 sec period which will 37 be programmed directly to calibration register. 38 $ref: /schemas/types.yaml#/definitions/uint32 39 minimum: 0x1 40 maximum: 0x1FFFFF 41 default: 0x198233 42 43required: 44 - compatible 45 - reg 46 - interrupts 47 - interrupt-names 48 49additionalProperties: false 50 51examples: 52 - | 53 soc { 54 #address-cells = <2>; 55 #size-cells = <2>; 56 57 rtc: rtc@ffa60000 { 58 compatible = "xlnx,zynqmp-rtc"; 59 reg = <0x0 0xffa60000 0x0 0x100>; 60 interrupt-parent = <&gic>; 61 interrupts = <0 26 4>, <0 27 4>; 62 interrupt-names = "alarm", "sec"; 63 calibration = <0x198233>; 64 }; 65 }; 66