xref: /freebsd/sys/contrib/device-tree/Bindings/rtc/xlnx,zynqmp-rtc.yaml (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/rtc/xlnx,zynqmp-rtc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
8
9description:
10  RTC controller for the Xilinx Zynq MPSoC Real Time Clock.
11  The RTC controller has separate IRQ lines for seconds and alarm.
12
13maintainers:
14  - Michal Simek <michal.simek@amd.com>
15
16allOf:
17  - $ref: rtc.yaml#
18
19properties:
20  compatible:
21    const: xlnx,zynqmp-rtc
22
23  reg:
24    maxItems: 1
25
26  clocks:
27    maxItems: 1
28
29  clock-names:
30    items:
31      - const: rtc
32
33  interrupts:
34    maxItems: 2
35
36  interrupt-names:
37    items:
38      - const: alarm
39      - const: sec
40
41  calibration:
42    description: |
43      calibration value for 1 sec period which will
44      be programmed directly to calibration register.
45    $ref: /schemas/types.yaml#/definitions/uint32
46    minimum: 0x1
47    maximum: 0x1FFFFF
48    default: 0x198233
49    deprecated: true
50
51required:
52  - compatible
53  - reg
54  - interrupts
55  - interrupt-names
56
57additionalProperties: false
58
59examples:
60  - |
61    soc {
62      #address-cells = <2>;
63      #size-cells = <2>;
64
65      rtc: rtc@ffa60000 {
66        compatible = "xlnx,zynqmp-rtc";
67        reg = <0x0 0xffa60000 0x0 0x100>;
68        interrupt-parent = <&gic>;
69        interrupts = <0 26 4>, <0 27 4>;
70        interrupt-names = "alarm", "sec";
71        calibration = <0x198233>;
72        clock-names = "rtc";
73        clocks = <&rtc_clk>;
74      };
75    };
76