1*ae5de77eSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*ae5de77eSEmmanuel Vadot%YAML 1.2 3*ae5de77eSEmmanuel Vadot--- 4*ae5de77eSEmmanuel Vadot$id: http://devicetree.org/schemas/rtc/nxp,s32g-rtc.yaml# 5*ae5de77eSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ae5de77eSEmmanuel Vadot 7*ae5de77eSEmmanuel Vadottitle: NXP S32G2/S32G3 Real Time Clock (RTC) 8*ae5de77eSEmmanuel Vadot 9*ae5de77eSEmmanuel Vadotmaintainers: 10*ae5de77eSEmmanuel Vadot - Bogdan Hamciuc <bogdan.hamciuc@nxp.com> 11*ae5de77eSEmmanuel Vadot - Ciprian Marian Costea <ciprianmarian.costea@nxp.com> 12*ae5de77eSEmmanuel Vadot 13*ae5de77eSEmmanuel Vadotdescription: 14*ae5de77eSEmmanuel Vadot RTC hardware module present on S32G2/S32G3 SoCs is used as a wakeup source. 15*ae5de77eSEmmanuel Vadot It is not kept alive during system reset and it is not battery-powered. 16*ae5de77eSEmmanuel Vadot 17*ae5de77eSEmmanuel VadotallOf: 18*ae5de77eSEmmanuel Vadot - $ref: rtc.yaml# 19*ae5de77eSEmmanuel Vadot 20*ae5de77eSEmmanuel Vadotproperties: 21*ae5de77eSEmmanuel Vadot compatible: 22*ae5de77eSEmmanuel Vadot oneOf: 23*ae5de77eSEmmanuel Vadot - enum: 24*ae5de77eSEmmanuel Vadot - nxp,s32g2-rtc 25*ae5de77eSEmmanuel Vadot - items: 26*ae5de77eSEmmanuel Vadot - const: nxp,s32g3-rtc 27*ae5de77eSEmmanuel Vadot - const: nxp,s32g2-rtc 28*ae5de77eSEmmanuel Vadot 29*ae5de77eSEmmanuel Vadot reg: 30*ae5de77eSEmmanuel Vadot maxItems: 1 31*ae5de77eSEmmanuel Vadot 32*ae5de77eSEmmanuel Vadot interrupts: 33*ae5de77eSEmmanuel Vadot maxItems: 1 34*ae5de77eSEmmanuel Vadot 35*ae5de77eSEmmanuel Vadot clocks: 36*ae5de77eSEmmanuel Vadot items: 37*ae5de77eSEmmanuel Vadot - description: ipg clock drives the access to the RTC iomapped registers 38*ae5de77eSEmmanuel Vadot - description: Clock source for the RTC module. Can be selected between 39*ae5de77eSEmmanuel Vadot 4 different clock sources using an integrated hardware mux. 40*ae5de77eSEmmanuel Vadot On S32G2/S32G3 SoCs, 'source0' is the SIRC clock (~32KHz) and it is 41*ae5de77eSEmmanuel Vadot available during standby and runtime. 'source1' is reserved and cannot 42*ae5de77eSEmmanuel Vadot be used. 'source2' is the FIRC clock and it is only available during 43*ae5de77eSEmmanuel Vadot runtime providing a better resolution (~48MHz). 'source3' is an external 44*ae5de77eSEmmanuel Vadot RTC clock source which can be additionally added in hardware. 45*ae5de77eSEmmanuel Vadot 46*ae5de77eSEmmanuel Vadot clock-names: 47*ae5de77eSEmmanuel Vadot items: 48*ae5de77eSEmmanuel Vadot - const: ipg 49*ae5de77eSEmmanuel Vadot - enum: [ source0, source1, source2, source3 ] 50*ae5de77eSEmmanuel Vadot 51*ae5de77eSEmmanuel Vadotrequired: 52*ae5de77eSEmmanuel Vadot - compatible 53*ae5de77eSEmmanuel Vadot - reg 54*ae5de77eSEmmanuel Vadot - interrupts 55*ae5de77eSEmmanuel Vadot - clocks 56*ae5de77eSEmmanuel Vadot - clock-names 57*ae5de77eSEmmanuel Vadot 58*ae5de77eSEmmanuel VadotadditionalProperties: false 59*ae5de77eSEmmanuel Vadot 60*ae5de77eSEmmanuel Vadotexamples: 61*ae5de77eSEmmanuel Vadot - | 62*ae5de77eSEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 63*ae5de77eSEmmanuel Vadot #include <dt-bindings/interrupt-controller/irq.h> 64*ae5de77eSEmmanuel Vadot 65*ae5de77eSEmmanuel Vadot rtc@40060000 { 66*ae5de77eSEmmanuel Vadot compatible = "nxp,s32g3-rtc", 67*ae5de77eSEmmanuel Vadot "nxp,s32g2-rtc"; 68*ae5de77eSEmmanuel Vadot reg = <0x40060000 0x1000>; 69*ae5de77eSEmmanuel Vadot interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 70*ae5de77eSEmmanuel Vadot clocks = <&clks 54>, <&clks 55>; 71*ae5de77eSEmmanuel Vadot clock-names = "ipg", "source0"; 72*ae5de77eSEmmanuel Vadot }; 73