1*5f62a964SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*5f62a964SEmmanuel Vadot%YAML 1.2 3*5f62a964SEmmanuel Vadot--- 4*5f62a964SEmmanuel Vadot$id: http://devicetree.org/schemas/rtc/microchip,mpfs-rtc.yaml# 5*5f62a964SEmmanuel Vadot 6*5f62a964SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 7*5f62a964SEmmanuel Vadot 8*5f62a964SEmmanuel Vadottitle: Microchip PolarFire Soc (MPFS) RTC 9*5f62a964SEmmanuel Vadot 10*5f62a964SEmmanuel VadotallOf: 11*5f62a964SEmmanuel Vadot - $ref: rtc.yaml# 12*5f62a964SEmmanuel Vadot 13*5f62a964SEmmanuel Vadotmaintainers: 14*5f62a964SEmmanuel Vadot - Daire McNamara <daire.mcnamara@microchip.com> 15*5f62a964SEmmanuel Vadot 16*5f62a964SEmmanuel Vadotproperties: 17*5f62a964SEmmanuel Vadot compatible: 18*5f62a964SEmmanuel Vadot oneOf: 19*5f62a964SEmmanuel Vadot - items: 20*5f62a964SEmmanuel Vadot - const: microchip,pic64gx-rtc 21*5f62a964SEmmanuel Vadot - const: microchip,mpfs-rtc 22*5f62a964SEmmanuel Vadot - const: microchip,mpfs-rtc 23*5f62a964SEmmanuel Vadot 24*5f62a964SEmmanuel Vadot reg: 25*5f62a964SEmmanuel Vadot maxItems: 1 26*5f62a964SEmmanuel Vadot 27*5f62a964SEmmanuel Vadot interrupts: 28*5f62a964SEmmanuel Vadot items: 29*5f62a964SEmmanuel Vadot - description: | 30*5f62a964SEmmanuel Vadot RTC_WAKEUP interrupt 31*5f62a964SEmmanuel Vadot - description: | 32*5f62a964SEmmanuel Vadot RTC_MATCH, asserted when the content of the Alarm register is equal 33*5f62a964SEmmanuel Vadot to that of the RTC's count register. 34*5f62a964SEmmanuel Vadot 35*5f62a964SEmmanuel Vadot clocks: 36*5f62a964SEmmanuel Vadot items: 37*5f62a964SEmmanuel Vadot - description: | 38*5f62a964SEmmanuel Vadot AHB clock 39*5f62a964SEmmanuel Vadot - description: | 40*5f62a964SEmmanuel Vadot Reference clock: divided by the prescaler to create a time-based 41*5f62a964SEmmanuel Vadot strobe (typically 1 Hz) for the calendar counter. By default, the rtc 42*5f62a964SEmmanuel Vadot on the PolarFire SoC shares it's reference with MTIMER so this will 43*5f62a964SEmmanuel Vadot be a 1 MHz clock. 44*5f62a964SEmmanuel Vadot 45*5f62a964SEmmanuel Vadot clock-names: 46*5f62a964SEmmanuel Vadot items: 47*5f62a964SEmmanuel Vadot - const: rtc 48*5f62a964SEmmanuel Vadot - const: rtcref 49*5f62a964SEmmanuel Vadot 50*5f62a964SEmmanuel Vadotrequired: 51*5f62a964SEmmanuel Vadot - compatible 52*5f62a964SEmmanuel Vadot - reg 53*5f62a964SEmmanuel Vadot - interrupts 54*5f62a964SEmmanuel Vadot - clocks 55*5f62a964SEmmanuel Vadot - clock-names 56*5f62a964SEmmanuel Vadot 57*5f62a964SEmmanuel VadotadditionalProperties: false 58*5f62a964SEmmanuel Vadot 59*5f62a964SEmmanuel Vadotexamples: 60*5f62a964SEmmanuel Vadot - | 61*5f62a964SEmmanuel Vadot #include "dt-bindings/clock/microchip,mpfs-clock.h" 62*5f62a964SEmmanuel Vadot rtc@20124000 { 63*5f62a964SEmmanuel Vadot compatible = "microchip,mpfs-rtc"; 64*5f62a964SEmmanuel Vadot reg = <0x20124000 0x1000>; 65*5f62a964SEmmanuel Vadot clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>; 66*5f62a964SEmmanuel Vadot clock-names = "rtc", "rtcref"; 67*5f62a964SEmmanuel Vadot interrupts = <80>, <81>; 68*5f62a964SEmmanuel Vadot }; 69*5f62a964SEmmanuel Vadot... 70