1UniPhier glue reset controller 2 3 4Peripheral core reset in glue layer 5----------------------------------- 6 7Some peripheral core reset belongs to its own glue layer. Before using 8this core reset, it is necessary to control the clocks and resets to enable 9this layer. These clocks and resets should be described in each property. 10 11Required properties: 12- compatible: Should be 13 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3 14 "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB3 15 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3 16 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3 17 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3 18 "socionext,uniphier-pro4-ahci-reset" - for Pro4 SoC AHCI 19 "socionext,uniphier-pxs2-ahci-reset" - for PXs2 SoC AHCI 20 "socionext,uniphier-pxs3-ahci-reset" - for PXs3 SoC AHCI 21- #reset-cells: Should be 1. 22- reg: Specifies offset and length of the register set for the device. 23- clocks: A list of phandles to the clock gate for the glue layer. 24 According to the clock-names, appropriate clocks are required. 25- clock-names: Should contain 26 "gio", "link" - for Pro4 and Pro5 SoCs 27 "link" - for others 28- resets: A list of phandles to the reset control for the glue layer. 29 According to the reset-names, appropriate resets are required. 30- reset-names: Should contain 31 "gio", "link" - for Pro4 and Pro5 SoCs 32 "link" - for others 33 34Example: 35 36 usb-glue@65b00000 { 37 compatible = "socionext,uniphier-ld20-dwc3-glue", 38 "simple-mfd"; 39 #address-cells = <1>; 40 #size-cells = <1>; 41 ranges = <0 0x65b00000 0x400>; 42 43 usb_rst: reset@0 { 44 compatible = "socionext,uniphier-ld20-usb3-reset"; 45 reg = <0x0 0x4>; 46 #reset-cells = <1>; 47 clock-names = "link"; 48 clocks = <&sys_clk 14>; 49 reset-names = "link"; 50 resets = <&sys_rst 14>; 51 }; 52 53 regulator { 54 ... 55 }; 56 57 phy { 58 ... 59 }; 60 ... 61 }; 62