1Binding for the AXS10x reset controller 2 3This binding describes the ARC AXS10x boards custom IP-block which allows 4to control reset signals of selected peripherals. For example DW GMAC, etc... 5This block is controlled via memory-mapped register (AKA CREG) which 6represents up-to 32 reset lines. 7 8As of today only the following lines are used: 9 - DW GMAC - line 5 10 11This binding uses the common reset binding[1]. 12 13[1] Documentation/devicetree/bindings/reset/reset.txt 14 15Required properties: 16- compatible: should be "snps,axs10x-reset". 17- reg: should always contain pair address - length: for creg reset 18 bits register. 19- #reset-cells: from common reset binding; Should always be set to 1. 20 21Example: 22 reset: reset-controller@11220 { 23 compatible = "snps,axs10x-reset"; 24 #reset-cells = <1>; 25 reg = <0x11220 0x4>; 26 }; 27 28Specifying reset lines connected to IP modules: 29 ethernet@.... { 30 .... 31 resets = <&reset 5>; 32 .... 33 }; 34