1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/reset/renesas,rst.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Renesas R-Car and RZ/G Reset Controller 8 9maintainers: 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 - Magnus Damm <magnus.damm@gmail.com> 12 13description: | 14 The R-Car and RZ/G Reset Controllers provide reset control, and implement the 15 following functions: 16 - Latching of the levels on mode pins when PRESET# is negated, 17 - Mode monitoring register, 18 - Reset control of peripheral devices (on R-Car Gen1), 19 - Watchdog timer (on R-Car Gen1), 20 - Register-based reset control and boot address registers for the various 21 CPU cores (on R-Car Gen2 and Gen3, and on RZ/G). 22 23properties: 24 compatible: 25 enum: 26 - renesas,r8a7742-rst # RZ/G1H 27 - renesas,r8a7743-rst # RZ/G1M 28 - renesas,r8a7744-rst # RZ/G1N 29 - renesas,r8a7745-rst # RZ/G1E 30 - renesas,r8a77470-rst # RZ/G1C 31 - renesas,r8a774a1-rst # RZ/G2M 32 - renesas,r8a774b1-rst # RZ/G2N 33 - renesas,r8a774c0-rst # RZ/G2E 34 - renesas,r8a774e1-rst # RZ/G2H 35 - renesas,r8a7778-reset-wdt # R-Car M1A 36 - renesas,r8a7779-reset-wdt # R-Car H1 37 - renesas,r8a7790-rst # R-Car H2 38 - renesas,r8a7791-rst # R-Car M2-W 39 - renesas,r8a7792-rst # R-Car V2H 40 - renesas,r8a7793-rst # R-Car M2-N 41 - renesas,r8a7794-rst # R-Car E2 42 - renesas,r8a7795-rst # R-Car H3 43 - renesas,r8a7796-rst # R-Car M3-W 44 - renesas,r8a77961-rst # R-Car M3-W+ 45 - renesas,r8a77965-rst # R-Car M3-N 46 - renesas,r8a77970-rst # R-Car V3M 47 - renesas,r8a77980-rst # R-Car V3H 48 - renesas,r8a77990-rst # R-Car E3 49 - renesas,r8a77995-rst # R-Car D3 50 - renesas,r8a779a0-rst # R-Car V3U 51 52 reg: 53 maxItems: 1 54 55required: 56 - compatible 57 - reg 58 59additionalProperties: false 60 61examples: 62 - | 63 rst: reset-controller@e6160000 { 64 compatible = "renesas,r8a7795-rst"; 65 reg = <0xe6160000 0x0200>; 66 }; 67