1*c66ec88fSEmmanuel VadotNXP LPC1850 Reset Generation Unit (RGU) 2*c66ec88fSEmmanuel Vadot======================================== 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotPlease also refer to reset.txt in this directory for common reset 5*c66ec88fSEmmanuel Vadotcontroller binding usage. 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel VadotRequired properties: 8*c66ec88fSEmmanuel Vadot- compatible: Should be "nxp,lpc1850-rgu" 9*c66ec88fSEmmanuel Vadot- reg: register base and length 10*c66ec88fSEmmanuel Vadot- clocks: phandle and clock specifier to RGU clocks 11*c66ec88fSEmmanuel Vadot- clock-names: should contain "delay" and "reg" 12*c66ec88fSEmmanuel Vadot- #reset-cells: should be 1 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel VadotSee table below for valid peripheral reset numbers. Numbers not 15*c66ec88fSEmmanuel Vadotin the table below are either reserved or not applicable for 16*c66ec88fSEmmanuel Vadotnormal operation. 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel VadotReset Peripheral 19*c66ec88fSEmmanuel Vadot 9 System control unit (SCU) 20*c66ec88fSEmmanuel Vadot 12 ARM Cortex-M0 subsystem core (LPC43xx only) 21*c66ec88fSEmmanuel Vadot 13 CPU core 22*c66ec88fSEmmanuel Vadot 16 LCD controller 23*c66ec88fSEmmanuel Vadot 17 USB0 24*c66ec88fSEmmanuel Vadot 18 USB1 25*c66ec88fSEmmanuel Vadot 19 DMA 26*c66ec88fSEmmanuel Vadot 20 SDIO 27*c66ec88fSEmmanuel Vadot 21 External memory controller (EMC) 28*c66ec88fSEmmanuel Vadot 22 Ethernet 29*c66ec88fSEmmanuel Vadot 25 Flash bank A 30*c66ec88fSEmmanuel Vadot 27 EEPROM 31*c66ec88fSEmmanuel Vadot 28 GPIO 32*c66ec88fSEmmanuel Vadot 29 Flash bank B 33*c66ec88fSEmmanuel Vadot 32 Timer0 34*c66ec88fSEmmanuel Vadot 33 Timer1 35*c66ec88fSEmmanuel Vadot 34 Timer2 36*c66ec88fSEmmanuel Vadot 35 Timer3 37*c66ec88fSEmmanuel Vadot 36 Repetitive Interrupt timer (RIT) 38*c66ec88fSEmmanuel Vadot 37 State Configurable Timer (SCT) 39*c66ec88fSEmmanuel Vadot 38 Motor control PWM (MCPWM) 40*c66ec88fSEmmanuel Vadot 39 QEI 41*c66ec88fSEmmanuel Vadot 40 ADC0 42*c66ec88fSEmmanuel Vadot 41 ADC1 43*c66ec88fSEmmanuel Vadot 42 DAC 44*c66ec88fSEmmanuel Vadot 44 USART0 45*c66ec88fSEmmanuel Vadot 45 UART1 46*c66ec88fSEmmanuel Vadot 46 USART2 47*c66ec88fSEmmanuel Vadot 47 USART3 48*c66ec88fSEmmanuel Vadot 48 I2C0 49*c66ec88fSEmmanuel Vadot 49 I2C1 50*c66ec88fSEmmanuel Vadot 50 SSP0 51*c66ec88fSEmmanuel Vadot 51 SSP1 52*c66ec88fSEmmanuel Vadot 52 I2S0 and I2S1 53*c66ec88fSEmmanuel Vadot 53 Serial Flash Interface (SPIFI) 54*c66ec88fSEmmanuel Vadot 54 C_CAN1 55*c66ec88fSEmmanuel Vadot 55 C_CAN0 56*c66ec88fSEmmanuel Vadot 56 ARM Cortex-M0 application core (LPC4370 only) 57*c66ec88fSEmmanuel Vadot 57 SGPIO (LPC43xx only) 58*c66ec88fSEmmanuel Vadot 58 SPI (LPC43xx only) 59*c66ec88fSEmmanuel Vadot 60 ADCHS (12-bit ADC) (LPC4370 only) 60*c66ec88fSEmmanuel Vadot 61*c66ec88fSEmmanuel VadotRefer to NXP LPC18xx or LPC43xx user manual for more details about 62*c66ec88fSEmmanuel Vadotthe reset signals and the connected block/peripheral. 63*c66ec88fSEmmanuel Vadot 64*c66ec88fSEmmanuel VadotReset provider example: 65*c66ec88fSEmmanuel Vadotrgu: reset-controller@40053000 { 66*c66ec88fSEmmanuel Vadot compatible = "nxp,lpc1850-rgu"; 67*c66ec88fSEmmanuel Vadot reg = <0x40053000 0x1000>; 68*c66ec88fSEmmanuel Vadot clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_BUS>; 69*c66ec88fSEmmanuel Vadot clock-names = "delay", "reg"; 70*c66ec88fSEmmanuel Vadot #reset-cells = <1>; 71*c66ec88fSEmmanuel Vadot}; 72*c66ec88fSEmmanuel Vadot 73*c66ec88fSEmmanuel VadotReset consumer example: 74*c66ec88fSEmmanuel Vadotmac: ethernet@40010000 { 75*c66ec88fSEmmanuel Vadot compatible = "nxp,lpc1850-dwmac", "snps,dwmac-3.611", "snps,dwmac"; 76*c66ec88fSEmmanuel Vadot reg = <0x40010000 0x2000>; 77*c66ec88fSEmmanuel Vadot interrupts = <5>; 78*c66ec88fSEmmanuel Vadot interrupt-names = "macirq"; 79*c66ec88fSEmmanuel Vadot clocks = <&ccu1 CLK_CPU_ETHERNET>; 80*c66ec88fSEmmanuel Vadot clock-names = "stmmaceth"; 81*c66ec88fSEmmanuel Vadot resets = <&rgu 22>; 82*c66ec88fSEmmanuel Vadot reset-names = "stmmaceth"; 83*c66ec88fSEmmanuel Vadot}; 84