1Hisilicon System Reset Controller 2====================================== 3 4Please also refer to reset.txt in this directory for common reset 5controller binding usage. 6 7The reset controller registers are part of the system-ctl block on 8hi3660 and hi3670 SoCs. 9 10Required properties: 11- compatible: should be one of the following: 12 "hisilicon,hi3660-reset" for HI3660 13 "hisilicon,hi3670-reset", "hisilicon,hi3660-reset" for HI3670 14- hisi,rst-syscon: phandle of the reset's syscon. 15- #reset-cells : Specifies the number of cells needed to encode a 16 reset source. The type shall be a <u32> and the value shall be 2. 17 18 Cell #1 : offset of the reset assert control 19 register from the syscon register base 20 offset + 4: deassert control register 21 offset + 8: status control register 22 Cell #2 : bit position of the reset in the reset control register 23 24Example: 25 iomcu: iomcu@ffd7e000 { 26 compatible = "hisilicon,hi3660-iomcu", "syscon"; 27 reg = <0x0 0xffd7e000 0x0 0x1000>; 28 }; 29 30 iomcu_rst: iomcu_rst_controller { 31 compatible = "hisilicon,hi3660-reset"; 32 hisi,rst-syscon = <&iomcu>; 33 #reset-cells = <2>; 34 }; 35 36Specifying reset lines connected to IP modules 37============================================== 38example: 39 40 i2c0: i2c@..... { 41 ... 42 resets = <&iomcu_rst 0x20 3>; /* offset: 0x20; bit: 3 */ 43 ... 44 }; 45