xref: /freebsd/sys/contrib/device-tree/Bindings/remoteproc/ti,k3-dsp-rproc.yaml (revision fe6060f10f634930ff71b7c50291ddc610da2475)
1# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TI K3 DSP devices
8
9maintainers:
10  - Suman Anna <s-anna@ti.com>
11
12description: |
13  The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14  that are used to offload some of the processor-intensive tasks or algorithms,
15  for achieving various system level goals.
16
17  These processor sub-systems usually contain additional sub-modules like
18  L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
19  controller, a dedicated local power/sleep controller etc. The DSP processor
20  cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a
21  TMS320C71x CorePac processor.
22
23  Each DSP Core sub-system is represented as a single DT node. Each node has a
24  number of required or optional properties that enable the OS running on the
25  host processor (Arm CorePac) to perform the device management of the remote
26  processor and to communicate with the remote processor.
27
28allOf:
29  - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
30
31properties:
32  compatible:
33    enum:
34      - ti,j721e-c66-dsp
35      - ti,j721e-c71-dsp
36    description:
37      Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs
38      Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs
39
40  resets:
41    description: |
42      Should contain the phandle to the reset controller node managing the
43      local resets for this device, and a reset specifier.
44    maxItems: 1
45
46  firmware-name:
47    description: |
48      Should contain the name of the default firmware image
49      file located on the firmware search path
50
51  mboxes:
52    description: |
53      OMAP Mailbox specifier denoting the sub-mailbox, to be used for
54      communication with the remote processor. This property should match
55      with the sub-mailbox node used in the firmware image.
56    maxItems: 1
57
58  memory-region:
59    minItems: 2
60    maxItems: 8
61    description: |
62      phandle to the reserved memory nodes to be associated with the remoteproc
63      device. There should be at least two reserved memory nodes defined. The
64      reserved memory nodes should be carveout nodes, and should be defined as
65      per the bindings in
66      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
67    items:
68      - description: region used for dynamic DMA allocations like vrings and
69                     vring buffers
70      - description: region reserved for firmware image sections
71    additionalItems: true
72
73# Optional properties:
74# --------------------
75
76  sram:
77    $ref: /schemas/types.yaml#/definitions/phandle-array
78    minItems: 1
79    maxItems: 4
80    description: |
81      phandles to one or more reserved on-chip SRAM regions. The regions
82      should be defined as child nodes of the respective SRAM node, and
83      should be defined as per the generic bindings in,
84      Documentation/devicetree/bindings/sram/sram.yaml
85
86if:
87  properties:
88    compatible:
89      enum:
90        - ti,j721e-c66-dsp
91then:
92  properties:
93    reg:
94      items:
95        - description: Address and Size of the L2 SRAM internal memory region
96        - description: Address and Size of the L1 PRAM internal memory region
97        - description: Address and Size of the L1 DRAM internal memory region
98    reg-names:
99      items:
100        - const: l2sram
101        - const: l1pram
102        - const: l1dram
103else:
104  if:
105    properties:
106      compatible:
107        enum:
108          - ti,j721e-c71-dsp
109  then:
110    properties:
111      reg:
112        items:
113          - description: Address and Size of the L2 SRAM internal memory region
114          - description: Address and Size of the L1 DRAM internal memory region
115      reg-names:
116        items:
117          - const: l2sram
118          - const: l1dram
119
120required:
121  - compatible
122  - reg
123  - reg-names
124  - ti,sci
125  - ti,sci-dev-id
126  - ti,sci-proc-ids
127  - resets
128  - firmware-name
129  - mboxes
130  - memory-region
131
132unevaluatedProperties: false
133
134examples:
135  - |
136    / {
137        model = "Texas Instruments K3 J721E SoC";
138        compatible = "ti,j721e";
139        #address-cells = <2>;
140        #size-cells = <2>;
141
142        bus@100000 {
143            compatible = "simple-bus";
144            #address-cells = <2>;
145            #size-cells = <2>;
146            ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
147                     <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */
148                     <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */
149                     <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */
150
151            /* J721E C66_0 DSP node */
152            dsp@4d80800000 {
153                compatible = "ti,j721e-c66-dsp";
154                reg = <0x4d 0x80800000 0x00 0x00048000>,
155                      <0x4d 0x80e00000 0x00 0x00008000>,
156                      <0x4d 0x80f00000 0x00 0x00008000>;
157                reg-names = "l2sram", "l1pram", "l1dram";
158                ti,sci = <&dmsc>;
159                ti,sci-dev-id = <142>;
160                ti,sci-proc-ids = <0x03 0xFF>;
161                resets = <&k3_reset 142 1>;
162                firmware-name = "j7-c66_0-fw";
163                memory-region = <&c66_0_dma_memory_region>,
164                                <&c66_0_memory_region>;
165                mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
166            };
167
168            /* J721E C71_0 DSP node */
169            c71_0: dsp@64800000 {
170                compatible = "ti,j721e-c71-dsp";
171                reg = <0x00 0x64800000 0x00 0x00080000>,
172                      <0x00 0x64e00000 0x00 0x0000c000>;
173                reg-names = "l2sram", "l1dram";
174                ti,sci = <&dmsc>;
175                ti,sci-dev-id = <15>;
176                ti,sci-proc-ids = <0x30 0xFF>;
177                resets = <&k3_reset 15 1>;
178                firmware-name = "j7-c71_0-fw";
179                memory-region = <&c71_0_dma_memory_region>,
180                                <&c71_0_memory_region>;
181                mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
182            };
183        };
184    };
185