1*c66ec88fSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) 2*c66ec88fSEmmanuel Vadot%YAML 1.2 3*c66ec88fSEmmanuel Vadot--- 4*c66ec88fSEmmanuel Vadot$id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml# 5*c66ec88fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadottitle: TI K3 DSP devices 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadotmaintainers: 10*c66ec88fSEmmanuel Vadot - Suman Anna <s-anna@ti.com> 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadotdescription: | 13*c66ec88fSEmmanuel Vadot The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems 14*c66ec88fSEmmanuel Vadot that are used to offload some of the processor-intensive tasks or algorithms, 15*c66ec88fSEmmanuel Vadot for achieving various system level goals. 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel Vadot These processor sub-systems usually contain additional sub-modules like 18*c66ec88fSEmmanuel Vadot L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory 19*c66ec88fSEmmanuel Vadot controller, a dedicated local power/sleep controller etc. The DSP processor 20*c66ec88fSEmmanuel Vadot cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a 21*c66ec88fSEmmanuel Vadot TMS320C71x CorePac processor. 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadot Each DSP Core sub-system is represented as a single DT node. Each node has a 24*c66ec88fSEmmanuel Vadot number of required or optional properties that enable the OS running on the 25*c66ec88fSEmmanuel Vadot host processor (Arm CorePac) to perform the device management of the remote 26*c66ec88fSEmmanuel Vadot processor and to communicate with the remote processor. 27*c66ec88fSEmmanuel Vadot 28*c66ec88fSEmmanuel VadotallOf: 29*c66ec88fSEmmanuel Vadot - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel Vadotproperties: 32*c66ec88fSEmmanuel Vadot compatible: 33*c66ec88fSEmmanuel Vadot enum: 34*c66ec88fSEmmanuel Vadot - ti,j721e-c66-dsp 35*c66ec88fSEmmanuel Vadot - ti,j721e-c71-dsp 36*c66ec88fSEmmanuel Vadot description: 37*c66ec88fSEmmanuel Vadot Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs 38*c66ec88fSEmmanuel Vadot Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs 39*c66ec88fSEmmanuel Vadot 40*c66ec88fSEmmanuel Vadot resets: 41*c66ec88fSEmmanuel Vadot description: | 42*c66ec88fSEmmanuel Vadot Should contain the phandle to the reset controller node managing the 43*c66ec88fSEmmanuel Vadot local resets for this device, and a reset specifier. 44*c66ec88fSEmmanuel Vadot maxItems: 1 45*c66ec88fSEmmanuel Vadot 46*c66ec88fSEmmanuel Vadot firmware-name: 47*c66ec88fSEmmanuel Vadot description: | 48*c66ec88fSEmmanuel Vadot Should contain the name of the default firmware image 49*c66ec88fSEmmanuel Vadot file located on the firmware search path 50*c66ec88fSEmmanuel Vadot 51*c66ec88fSEmmanuel Vadot mboxes: 52*c66ec88fSEmmanuel Vadot description: | 53*c66ec88fSEmmanuel Vadot OMAP Mailbox specifier denoting the sub-mailbox, to be used for 54*c66ec88fSEmmanuel Vadot communication with the remote processor. This property should match 55*c66ec88fSEmmanuel Vadot with the sub-mailbox node used in the firmware image. 56*c66ec88fSEmmanuel Vadot maxItems: 1 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel Vadot memory-region: 59*c66ec88fSEmmanuel Vadot minItems: 2 60*c66ec88fSEmmanuel Vadot maxItems: 8 61*c66ec88fSEmmanuel Vadot description: | 62*c66ec88fSEmmanuel Vadot phandle to the reserved memory nodes to be associated with the remoteproc 63*c66ec88fSEmmanuel Vadot device. There should be at least two reserved memory nodes defined. The 64*c66ec88fSEmmanuel Vadot reserved memory nodes should be carveout nodes, and should be defined as 65*c66ec88fSEmmanuel Vadot per the bindings in 66*c66ec88fSEmmanuel Vadot Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt 67*c66ec88fSEmmanuel Vadot items: 68*c66ec88fSEmmanuel Vadot - description: region used for dynamic DMA allocations like vrings and 69*c66ec88fSEmmanuel Vadot vring buffers 70*c66ec88fSEmmanuel Vadot - description: region reserved for firmware image sections 71*c66ec88fSEmmanuel Vadot additionalItems: true 72*c66ec88fSEmmanuel Vadot 73*c66ec88fSEmmanuel Vadot# Optional properties: 74*c66ec88fSEmmanuel Vadot# -------------------- 75*c66ec88fSEmmanuel Vadot 76*c66ec88fSEmmanuel Vadot sram: 77*c66ec88fSEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/phandle-array 78*c66ec88fSEmmanuel Vadot minItems: 1 79*c66ec88fSEmmanuel Vadot maxItems: 4 80*c66ec88fSEmmanuel Vadot description: | 81*c66ec88fSEmmanuel Vadot phandles to one or more reserved on-chip SRAM regions. The regions 82*c66ec88fSEmmanuel Vadot should be defined as child nodes of the respective SRAM node, and 83*c66ec88fSEmmanuel Vadot should be defined as per the generic bindings in, 84*c66ec88fSEmmanuel Vadot Documentation/devicetree/bindings/sram/sram.yaml 85*c66ec88fSEmmanuel Vadot 86*c66ec88fSEmmanuel Vadotif: 87*c66ec88fSEmmanuel Vadot properties: 88*c66ec88fSEmmanuel Vadot compatible: 89*c66ec88fSEmmanuel Vadot enum: 90*c66ec88fSEmmanuel Vadot - ti,j721e-c66-dsp 91*c66ec88fSEmmanuel Vadotthen: 92*c66ec88fSEmmanuel Vadot properties: 93*c66ec88fSEmmanuel Vadot reg: 94*c66ec88fSEmmanuel Vadot items: 95*c66ec88fSEmmanuel Vadot - description: Address and Size of the L2 SRAM internal memory region 96*c66ec88fSEmmanuel Vadot - description: Address and Size of the L1 PRAM internal memory region 97*c66ec88fSEmmanuel Vadot - description: Address and Size of the L1 DRAM internal memory region 98*c66ec88fSEmmanuel Vadot reg-names: 99*c66ec88fSEmmanuel Vadot items: 100*c66ec88fSEmmanuel Vadot - const: l2sram 101*c66ec88fSEmmanuel Vadot - const: l1pram 102*c66ec88fSEmmanuel Vadot - const: l1dram 103*c66ec88fSEmmanuel Vadotelse: 104*c66ec88fSEmmanuel Vadot if: 105*c66ec88fSEmmanuel Vadot properties: 106*c66ec88fSEmmanuel Vadot compatible: 107*c66ec88fSEmmanuel Vadot enum: 108*c66ec88fSEmmanuel Vadot - ti,j721e-c71-dsp 109*c66ec88fSEmmanuel Vadot then: 110*c66ec88fSEmmanuel Vadot properties: 111*c66ec88fSEmmanuel Vadot reg: 112*c66ec88fSEmmanuel Vadot items: 113*c66ec88fSEmmanuel Vadot - description: Address and Size of the L2 SRAM internal memory region 114*c66ec88fSEmmanuel Vadot - description: Address and Size of the L1 DRAM internal memory region 115*c66ec88fSEmmanuel Vadot reg-names: 116*c66ec88fSEmmanuel Vadot items: 117*c66ec88fSEmmanuel Vadot - const: l2sram 118*c66ec88fSEmmanuel Vadot - const: l1dram 119*c66ec88fSEmmanuel Vadot 120*c66ec88fSEmmanuel Vadotrequired: 121*c66ec88fSEmmanuel Vadot - compatible 122*c66ec88fSEmmanuel Vadot - reg 123*c66ec88fSEmmanuel Vadot - reg-names 124*c66ec88fSEmmanuel Vadot - ti,sci 125*c66ec88fSEmmanuel Vadot - ti,sci-dev-id 126*c66ec88fSEmmanuel Vadot - ti,sci-proc-ids 127*c66ec88fSEmmanuel Vadot - resets 128*c66ec88fSEmmanuel Vadot - firmware-name 129*c66ec88fSEmmanuel Vadot - mboxes 130*c66ec88fSEmmanuel Vadot - memory-region 131*c66ec88fSEmmanuel Vadot 132*c66ec88fSEmmanuel VadotunevaluatedProperties: false 133*c66ec88fSEmmanuel Vadot 134*c66ec88fSEmmanuel Vadotexamples: 135*c66ec88fSEmmanuel Vadot - | 136*c66ec88fSEmmanuel Vadot / { 137*c66ec88fSEmmanuel Vadot model = "Texas Instruments K3 J721E SoC"; 138*c66ec88fSEmmanuel Vadot compatible = "ti,j721e"; 139*c66ec88fSEmmanuel Vadot #address-cells = <2>; 140*c66ec88fSEmmanuel Vadot #size-cells = <2>; 141*c66ec88fSEmmanuel Vadot 142*c66ec88fSEmmanuel Vadot bus@100000 { 143*c66ec88fSEmmanuel Vadot compatible = "simple-bus"; 144*c66ec88fSEmmanuel Vadot #address-cells = <2>; 145*c66ec88fSEmmanuel Vadot #size-cells = <2>; 146*c66ec88fSEmmanuel Vadot ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ 147*c66ec88fSEmmanuel Vadot <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */ 148*c66ec88fSEmmanuel Vadot <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */ 149*c66ec88fSEmmanuel Vadot <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */ 150*c66ec88fSEmmanuel Vadot 151*c66ec88fSEmmanuel Vadot /* J721E C66_0 DSP node */ 152*c66ec88fSEmmanuel Vadot dsp@4d80800000 { 153*c66ec88fSEmmanuel Vadot compatible = "ti,j721e-c66-dsp"; 154*c66ec88fSEmmanuel Vadot reg = <0x4d 0x80800000 0x00 0x00048000>, 155*c66ec88fSEmmanuel Vadot <0x4d 0x80e00000 0x00 0x00008000>, 156*c66ec88fSEmmanuel Vadot <0x4d 0x80f00000 0x00 0x00008000>; 157*c66ec88fSEmmanuel Vadot reg-names = "l2sram", "l1pram", "l1dram"; 158*c66ec88fSEmmanuel Vadot ti,sci = <&dmsc>; 159*c66ec88fSEmmanuel Vadot ti,sci-dev-id = <142>; 160*c66ec88fSEmmanuel Vadot ti,sci-proc-ids = <0x03 0xFF>; 161*c66ec88fSEmmanuel Vadot resets = <&k3_reset 142 1>; 162*c66ec88fSEmmanuel Vadot firmware-name = "j7-c66_0-fw"; 163*c66ec88fSEmmanuel Vadot memory-region = <&c66_0_dma_memory_region>, 164*c66ec88fSEmmanuel Vadot <&c66_0_memory_region>; 165*c66ec88fSEmmanuel Vadot mboxes = <&mailbox0_cluster3 &mbox_c66_0>; 166*c66ec88fSEmmanuel Vadot }; 167*c66ec88fSEmmanuel Vadot 168*c66ec88fSEmmanuel Vadot /* J721E C71_0 DSP node */ 169*c66ec88fSEmmanuel Vadot c71_0: dsp@64800000 { 170*c66ec88fSEmmanuel Vadot compatible = "ti,j721e-c71-dsp"; 171*c66ec88fSEmmanuel Vadot reg = <0x00 0x64800000 0x00 0x00080000>, 172*c66ec88fSEmmanuel Vadot <0x00 0x64e00000 0x00 0x0000c000>; 173*c66ec88fSEmmanuel Vadot reg-names = "l2sram", "l1dram"; 174*c66ec88fSEmmanuel Vadot ti,sci = <&dmsc>; 175*c66ec88fSEmmanuel Vadot ti,sci-dev-id = <15>; 176*c66ec88fSEmmanuel Vadot ti,sci-proc-ids = <0x30 0xFF>; 177*c66ec88fSEmmanuel Vadot resets = <&k3_reset 15 1>; 178*c66ec88fSEmmanuel Vadot firmware-name = "j7-c71_0-fw"; 179*c66ec88fSEmmanuel Vadot memory-region = <&c71_0_dma_memory_region>, 180*c66ec88fSEmmanuel Vadot <&c71_0_memory_region>; 181*c66ec88fSEmmanuel Vadot mboxes = <&mailbox0_cluster4 &mbox_c71_0>; 182*c66ec88fSEmmanuel Vadot }; 183*c66ec88fSEmmanuel Vadot }; 184*c66ec88fSEmmanuel Vadot }; 185