1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/remoteproc/qcom,sm6350-pas.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SM6350 Peripheral Authentication Service 8 9maintainers: 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 11 12description: 13 Qualcomm SM6350 SoC Peripheral Authentication Service loads and boots 14 firmware on the Qualcomm DSP Hexagon cores. 15 16properties: 17 compatible: 18 enum: 19 - qcom,sm6350-adsp-pas 20 - qcom,sm6350-cdsp-pas 21 - qcom,sm6350-mpss-pas 22 23 reg: 24 maxItems: 1 25 26 clocks: 27 items: 28 - description: XO clock 29 30 clock-names: 31 items: 32 - const: xo 33 34 qcom,qmp: 35 $ref: /schemas/types.yaml#/definitions/phandle 36 description: Reference to the AOSS side-channel message RAM. 37 38 memory-region: 39 minItems: 1 40 description: Reference to the reserved-memory for the Hexagon core 41 42 smd-edge: false 43 44 firmware-name: 45 $ref: /schemas/types.yaml#/definitions/string 46 description: Firmware name for the Hexagon core 47 48required: 49 - compatible 50 - reg 51 52allOf: 53 - $ref: /schemas/remoteproc/qcom,pas-common.yaml# 54 - if: 55 properties: 56 compatible: 57 enum: 58 - qcom,sm6350-adsp-pas 59 - qcom,sm6350-cdsp-pas 60 then: 61 properties: 62 interrupts: 63 maxItems: 5 64 interrupt-names: 65 maxItems: 5 66 else: 67 properties: 68 interrupts: 69 minItems: 6 70 interrupt-names: 71 minItems: 6 72 73 - if: 74 properties: 75 compatible: 76 enum: 77 - qcom,sm6350-adsp-pas 78 then: 79 properties: 80 power-domains: 81 items: 82 - description: LCX power domain 83 - description: LMX power domain 84 power-domain-names: 85 items: 86 - const: lcx 87 - const: lmx 88 89 - if: 90 properties: 91 compatible: 92 enum: 93 - qcom,sm6350-cdsp-pas 94 then: 95 properties: 96 power-domains: 97 items: 98 - description: CX power domain 99 - description: MX power domain 100 power-domain-names: 101 items: 102 - const: cx 103 - const: mx 104 105 - if: 106 properties: 107 compatible: 108 enum: 109 - qcom,sm6350-mpss-pas 110 then: 111 properties: 112 power-domains: 113 items: 114 - description: CX power domain 115 - description: MSS power domain 116 power-domain-names: 117 items: 118 - const: cx 119 - const: mss 120 121unevaluatedProperties: false 122 123examples: 124 - | 125 #include <dt-bindings/clock/qcom,rpmh.h> 126 #include <dt-bindings/interrupt-controller/irq.h> 127 #include <dt-bindings/mailbox/qcom-ipcc.h> 128 #include <dt-bindings/power/qcom-rpmpd.h> 129 130 remoteproc@3000000 { 131 compatible = "qcom,sm6350-adsp-pas"; 132 reg = <0x03000000 0x100>; 133 134 clocks = <&rpmhcc RPMH_CXO_CLK>; 135 clock-names = "xo"; 136 137 interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 138 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 139 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 140 <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 141 <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 142 interrupt-names = "wdog", "fatal", "ready", 143 "handover", "stop-ack"; 144 145 memory-region = <&pil_adsp_mem>; 146 147 power-domains = <&rpmhpd SM6350_LCX>, 148 <&rpmhpd SM6350_LMX>; 149 power-domain-names = "lcx", "lmx"; 150 151 qcom,qmp = <&aoss_qmp>; 152 qcom,smem-states = <&smp2p_adsp_out 0>; 153 qcom,smem-state-names = "stop"; 154 155 glink-edge { 156 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 157 IPCC_MPROC_SIGNAL_GLINK_QMP 158 IRQ_TYPE_EDGE_RISING>; 159 mboxes = <&ipcc IPCC_CLIENT_LPASS 160 IPCC_MPROC_SIGNAL_GLINK_QMP>; 161 162 label = "lpass"; 163 qcom,remote-pid = <2>; 164 165 /* ... */ 166 }; 167 }; 168