1*c66ec88fSEmmanuel VadotZTE ZX PWM controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot - compatible: Should be "zte,zx296718-pwm". 5*c66ec88fSEmmanuel Vadot - reg: Physical base address and length of the controller's registers. 6*c66ec88fSEmmanuel Vadot - clocks : The phandle and specifier referencing the controller's clocks. 7*c66ec88fSEmmanuel Vadot - clock-names: "pclk" for PCLK, "wclk" for WCLK to the PWM controller. The 8*c66ec88fSEmmanuel Vadot PCLK is for register access, while WCLK is the reference clock for 9*c66ec88fSEmmanuel Vadot calculating period and duty cycles. 10*c66ec88fSEmmanuel Vadot - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of 11*c66ec88fSEmmanuel Vadot the cells format. 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel VadotExample: 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel Vadot pwm: pwm@1439000 { 16*c66ec88fSEmmanuel Vadot compatible = "zte,zx296718-pwm"; 17*c66ec88fSEmmanuel Vadot reg = <0x1439000 0x1000>; 18*c66ec88fSEmmanuel Vadot clocks = <&lsp1crm LSP1_PWM_PCLK>, 19*c66ec88fSEmmanuel Vadot <&lsp1crm LSP1_PWM_WCLK>; 20*c66ec88fSEmmanuel Vadot clock-names = "pclk", "wclk"; 21*c66ec88fSEmmanuel Vadot #pwm-cells = <3>; 22*c66ec88fSEmmanuel Vadot }; 23