1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (C) 2020 SiFive, Inc. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: SiFive PWM controller 9 10maintainers: 11 - Sagar Kadam <sagar.kadam@sifive.com> 12 - Paul Walmsley <paul.walmsley@sifive.com> 13 14description: 15 Unlike most other PWM controllers, the SiFive PWM controller currently 16 only supports one period for all channels in the PWM. All PWMs need to 17 run at the same period. The period also has significant restrictions on 18 the values it can achieve, which the driver rounds to the nearest 19 achievable period. PWM RTL that corresponds to the IP block version 20 numbers can be found here - 21 22 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm 23 24allOf: 25 - $ref: pwm.yaml# 26 27properties: 28 compatible: 29 items: 30 - enum: 31 - sifive,fu540-c000-pwm 32 - sifive,fu740-c000-pwm 33 - const: sifive,pwm0 34 description: 35 Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported 36 compatible strings are "sifive,fu540-c000-pwm" and 37 "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the 38 SiFive FU540 and FU740 chip respectively, and "sifive,pwm0" for the 39 SiFive PWM v0 IP block with no chip integration tweaks. 40 Please refer to sifive-blocks-ip-versioning.txt for details. 41 42 reg: 43 maxItems: 1 44 45 clocks: 46 maxItems: 1 47 48 "#pwm-cells": 49 const: 3 50 51 interrupts: 52 maxItems: 4 53 description: 54 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator. 55 56required: 57 - compatible 58 - reg 59 - clocks 60 - interrupts 61 62additionalProperties: false 63 64examples: 65 - | 66 pwm: pwm@10020000 { 67 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0"; 68 reg = <0x10020000 0x1000>; 69 clocks = <&tlclk>; 70 interrupt-parent = <&plic>; 71 interrupts = <42>, <43>, <44>, <45>; 72 #pwm-cells = <3>; 73 }; 74