1Freescale FlexTimer Module (FTM) PWM controller 2 3The same FTM PWM device can have a different endianness on different SoCs. The 4device tree provides a property to describing this so that an operating system 5device driver can handle all variants of the device. Refer to the table below 6for the endianness of the FTM PWM block as integrated into the existing SoCs: 7 8 SoC | FTM-PWM endianness 9 --------+------------------- 10 Vybrid | LE 11 LS1 | BE 12 LS2 | LE 13 14Please see ../regmap/regmap.txt for more detail about how to specify endian 15modes in device tree. 16 17 18Required properties: 19- compatible : should be "fsl,<soc>-ftm-pwm" and one of the following 20 compatible strings: 21 - "fsl,vf610-ftm-pwm" for PWM compatible with the one integrated on VF610 22 - "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM 23- reg: Physical base address and length of the controller's registers 24- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of 25 the cells format. 26- clock-names: Should include the following module clock source entries: 27 "ftm_sys" (module clock, also can be used as counter clock), 28 "ftm_ext" (external counter clock), 29 "ftm_fix" (fixed counter clock), 30 "ftm_cnt_clk_en" (external and fixed counter clock enable/disable). 31- clocks: Must contain a phandle and clock specifier for each entry in 32 clock-names, please see clock/clock-bindings.txt for details of the property 33 values. 34- pinctrl-names: Must contain a "default" entry. 35- pinctrl-NNN: One property must exist for each entry in pinctrl-names. 36 See pinctrl/pinctrl-bindings.txt for details of the property values. 37- big-endian: Boolean property, required if the FTM PWM registers use a big- 38 endian rather than little-endian layout. 39 40Example: 41 42pwm0: pwm@40038000 { 43 compatible = "fsl,vf610-ftm-pwm"; 44 reg = <0x40038000 0x1000>; 45 #pwm-cells = <3>; 46 clock-names = "ftm_sys", "ftm_ext", 47 "ftm_fix", "ftm_cnt_clk_en"; 48 clocks = <&clks VF610_CLK_FTM0>, 49 <&clks VF610_CLK_FTM0_EXT_SEL>, 50 <&clks VF610_CLK_FTM0_FIX_SEL>, 51 <&clks VF610_CLK_FTM0_EXT_FIX_EN>; 52 pinctrl-names = "default"; 53 pinctrl-0 = <&pinctrl_pwm0_1>; 54 big-endian; 55}; 56