1*c66ec88fSEmmanuel VadotTegra SoC PWFM controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible: Must be: 5*c66ec88fSEmmanuel Vadot - "nvidia,tegra20-pwm": for Tegra20 6*c66ec88fSEmmanuel Vadot - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30 7*c66ec88fSEmmanuel Vadot - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114 8*c66ec88fSEmmanuel Vadot - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124 9*c66ec88fSEmmanuel Vadot - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132 10*c66ec88fSEmmanuel Vadot - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210 11*c66ec88fSEmmanuel Vadot - "nvidia,tegra186-pwm": for Tegra186 12*c66ec88fSEmmanuel Vadot - "nvidia,tegra194-pwm": for Tegra194 13*c66ec88fSEmmanuel Vadot- reg: physical base address and length of the controller's registers 14*c66ec88fSEmmanuel Vadot- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of 15*c66ec88fSEmmanuel Vadot the cells format. 16*c66ec88fSEmmanuel Vadot- clocks: Must contain one entry, for the module clock. 17*c66ec88fSEmmanuel Vadot See ../clocks/clock-bindings.txt for details. 18*c66ec88fSEmmanuel Vadot- resets: Must contain an entry for each entry in reset-names. 19*c66ec88fSEmmanuel Vadot See ../reset/reset.txt for details. 20*c66ec88fSEmmanuel Vadot- reset-names: Must include the following entries: 21*c66ec88fSEmmanuel Vadot - pwm 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel VadotOptional properties: 24*c66ec88fSEmmanuel Vadot============================ 25*c66ec88fSEmmanuel VadotIn some of the interface like PWM based regulator device, it is required 26*c66ec88fSEmmanuel Vadotto configure the pins differently in different states, especially in suspend 27*c66ec88fSEmmanuel Vadotstate of the system. The configuration of pin is provided via the pinctrl 28*c66ec88fSEmmanuel VadotDT node as detailed in the pinctrl DT binding document 29*c66ec88fSEmmanuel Vadot Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel VadotThe PWM node will have following optional properties. 32*c66ec88fSEmmanuel Vadotpinctrl-names: Pin state names. Must be "default" and "sleep". 33*c66ec88fSEmmanuel Vadotpinctrl-0: phandle for the default/active state of pin configurations. 34*c66ec88fSEmmanuel Vadotpinctrl-1: phandle for the sleep state of pin configurations. 35*c66ec88fSEmmanuel Vadot 36*c66ec88fSEmmanuel VadotExample: 37*c66ec88fSEmmanuel Vadot 38*c66ec88fSEmmanuel Vadot pwm: pwm@7000a000 { 39*c66ec88fSEmmanuel Vadot compatible = "nvidia,tegra20-pwm"; 40*c66ec88fSEmmanuel Vadot reg = <0x7000a000 0x100>; 41*c66ec88fSEmmanuel Vadot #pwm-cells = <2>; 42*c66ec88fSEmmanuel Vadot clocks = <&tegra_car 17>; 43*c66ec88fSEmmanuel Vadot resets = <&tegra_car 17>; 44*c66ec88fSEmmanuel Vadot reset-names = "pwm"; 45*c66ec88fSEmmanuel Vadot }; 46*c66ec88fSEmmanuel Vadot 47*c66ec88fSEmmanuel Vadot 48*c66ec88fSEmmanuel VadotExample with the pin configuration for suspend and resume: 49*c66ec88fSEmmanuel Vadot========================================================= 50*c66ec88fSEmmanuel VadotSuppose pin PE7 (On Tegra210) interfaced with the regulator device and 51*c66ec88fSEmmanuel Vadotit requires PWM output to be tristated when system enters suspend. 52*c66ec88fSEmmanuel VadotFollowing will be DT binding to achieve this: 53*c66ec88fSEmmanuel Vadot 54*c66ec88fSEmmanuel Vadot#include <dt-bindings/pinctrl/pinctrl-tegra.h> 55*c66ec88fSEmmanuel Vadot 56*c66ec88fSEmmanuel Vadot pinmux@700008d4 { 57*c66ec88fSEmmanuel Vadot pwm_active_state: pwm_active_state { 58*c66ec88fSEmmanuel Vadot pe7 { 59*c66ec88fSEmmanuel Vadot nvidia,pins = "pe7"; 60*c66ec88fSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 61*c66ec88fSEmmanuel Vadot }; 62*c66ec88fSEmmanuel Vadot }; 63*c66ec88fSEmmanuel Vadot 64*c66ec88fSEmmanuel Vadot pwm_sleep_state: pwm_sleep_state { 65*c66ec88fSEmmanuel Vadot pe7 { 66*c66ec88fSEmmanuel Vadot nvidia,pins = "pe7"; 67*c66ec88fSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 68*c66ec88fSEmmanuel Vadot }; 69*c66ec88fSEmmanuel Vadot }; 70*c66ec88fSEmmanuel Vadot }; 71*c66ec88fSEmmanuel Vadot 72*c66ec88fSEmmanuel Vadot pwm@7000a000 { 73*c66ec88fSEmmanuel Vadot /* Mandatory PWM properties */ 74*c66ec88fSEmmanuel Vadot pinctrl-names = "default", "sleep"; 75*c66ec88fSEmmanuel Vadot pinctrl-0 = <&pwm_active_state>; 76*c66ec88fSEmmanuel Vadot pinctrl-1 = <&pwm_sleep_state>; 77*c66ec88fSEmmanuel Vadot }; 78