xref: /freebsd/sys/contrib/device-tree/Bindings/pwm/mediatek,pwm-disp.yaml (revision 350b7c3570aa6c87c537e54f706f1866f93a4142) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek DISP_PWM Controller Device Tree Bindings
8
9maintainers:
10  - Jitao Shi <jitao.shi@mediatek.com>
11  - Xinlei Lee <xinlei.lee@mediatek.com>
12
13allOf:
14  - $ref: pwm.yaml#
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - mediatek,mt2701-disp-pwm
21          - mediatek,mt6595-disp-pwm
22          - mediatek,mt8173-disp-pwm
23          - mediatek,mt8183-disp-pwm
24      - items:
25          - const: mediatek,mt8167-disp-pwm
26          - const: mediatek,mt8173-disp-pwm
27      - items:
28          - enum:
29              - mediatek,mt8186-disp-pwm
30              - mediatek,mt8192-disp-pwm
31              - mediatek,mt8195-disp-pwm
32          - const: mediatek,mt8183-disp-pwm
33
34  reg:
35    maxItems: 1
36
37  "#pwm-cells":
38    const: 2
39
40  interrupts:
41    maxItems: 1
42
43  clocks:
44    items:
45      - description: Main Clock
46      - description: Mm Clock
47
48  clock-names:
49    items:
50      - const: main
51      - const: mm
52
53required:
54  - compatible
55  - reg
56  - "#pwm-cells"
57  - clocks
58  - clock-names
59
60additionalProperties: false
61
62examples:
63  - |
64    #include <dt-bindings/interrupt-controller/arm-gic.h>
65    #include <dt-bindings/clock/mt8173-clk.h>
66    #include <dt-bindings/interrupt-controller/irq.h>
67
68    pwm0: pwm@1401e000 {
69        compatible = "mediatek,mt8173-disp-pwm";
70        reg = <0x1401e000 0x1000>;
71        #pwm-cells = <2>;
72        clocks = <&mmsys CLK_MM_DISP_PWM026M>,
73                 <&mmsys CLK_MM_DISP_PWM0MM>;
74        clock-names = "main", "mm";
75    };
76