xref: /freebsd/sys/contrib/device-tree/Bindings/pwm/mediatek,mt2712-pwm.yaml (revision cb7aa33ac6cd46a5434798e50363136e64f3ae98)
1*cb7aa33aSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*cb7aa33aSEmmanuel Vadot%YAML 1.2
3*cb7aa33aSEmmanuel Vadot---
4*cb7aa33aSEmmanuel Vadot$id: http://devicetree.org/schemas/pwm/mediatek,mt2712-pwm.yaml#
5*cb7aa33aSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*cb7aa33aSEmmanuel Vadot
7*cb7aa33aSEmmanuel Vadottitle: MediaTek PWM Controller
8*cb7aa33aSEmmanuel Vadot
9*cb7aa33aSEmmanuel Vadotmaintainers:
10*cb7aa33aSEmmanuel Vadot  - John Crispin <john@phrozen.org>
11*cb7aa33aSEmmanuel Vadot
12*cb7aa33aSEmmanuel VadotallOf:
13*cb7aa33aSEmmanuel Vadot  - $ref: pwm.yaml#
14*cb7aa33aSEmmanuel Vadot
15*cb7aa33aSEmmanuel Vadotproperties:
16*cb7aa33aSEmmanuel Vadot  compatible:
17*cb7aa33aSEmmanuel Vadot    oneOf:
18*cb7aa33aSEmmanuel Vadot      - enum:
19*cb7aa33aSEmmanuel Vadot          - mediatek,mt2712-pwm
20*cb7aa33aSEmmanuel Vadot          - mediatek,mt6795-pwm
21*cb7aa33aSEmmanuel Vadot          - mediatek,mt7622-pwm
22*cb7aa33aSEmmanuel Vadot          - mediatek,mt7623-pwm
23*cb7aa33aSEmmanuel Vadot          - mediatek,mt7628-pwm
24*cb7aa33aSEmmanuel Vadot          - mediatek,mt7629-pwm
25*cb7aa33aSEmmanuel Vadot          - mediatek,mt8183-pwm
26*cb7aa33aSEmmanuel Vadot          - mediatek,mt8365-pwm
27*cb7aa33aSEmmanuel Vadot          - mediatek,mt8516-pwm
28*cb7aa33aSEmmanuel Vadot      - items:
29*cb7aa33aSEmmanuel Vadot          - enum:
30*cb7aa33aSEmmanuel Vadot              - mediatek,mt8195-pwm
31*cb7aa33aSEmmanuel Vadot          - const: mediatek,mt8183-pwm
32*cb7aa33aSEmmanuel Vadot
33*cb7aa33aSEmmanuel Vadot  reg:
34*cb7aa33aSEmmanuel Vadot    maxItems: 1
35*cb7aa33aSEmmanuel Vadot
36*cb7aa33aSEmmanuel Vadot  "#pwm-cells":
37*cb7aa33aSEmmanuel Vadot    const: 2
38*cb7aa33aSEmmanuel Vadot
39*cb7aa33aSEmmanuel Vadot  interrupts:
40*cb7aa33aSEmmanuel Vadot    maxItems: 1
41*cb7aa33aSEmmanuel Vadot
42*cb7aa33aSEmmanuel Vadot  clocks:
43*cb7aa33aSEmmanuel Vadot    minItems: 2
44*cb7aa33aSEmmanuel Vadot    maxItems: 10
45*cb7aa33aSEmmanuel Vadot
46*cb7aa33aSEmmanuel Vadot  clock-names:
47*cb7aa33aSEmmanuel Vadot    description:
48*cb7aa33aSEmmanuel Vadot      This controller needs two input clocks for its core and one
49*cb7aa33aSEmmanuel Vadot      clock for each PWM output.
50*cb7aa33aSEmmanuel Vadot    minItems: 2
51*cb7aa33aSEmmanuel Vadot    items:
52*cb7aa33aSEmmanuel Vadot      - const: top
53*cb7aa33aSEmmanuel Vadot      - const: main
54*cb7aa33aSEmmanuel Vadot      - const: pwm1
55*cb7aa33aSEmmanuel Vadot      - const: pwm2
56*cb7aa33aSEmmanuel Vadot      - const: pwm3
57*cb7aa33aSEmmanuel Vadot      - const: pwm4
58*cb7aa33aSEmmanuel Vadot      - const: pwm5
59*cb7aa33aSEmmanuel Vadot      - const: pwm6
60*cb7aa33aSEmmanuel Vadot      - const: pwm7
61*cb7aa33aSEmmanuel Vadot      - const: pwm8
62*cb7aa33aSEmmanuel Vadot
63*cb7aa33aSEmmanuel Vadotrequired:
64*cb7aa33aSEmmanuel Vadot  - compatible
65*cb7aa33aSEmmanuel Vadot  - reg
66*cb7aa33aSEmmanuel Vadot  - "#pwm-cells"
67*cb7aa33aSEmmanuel Vadot  - clocks
68*cb7aa33aSEmmanuel Vadot  - clock-names
69*cb7aa33aSEmmanuel Vadot
70*cb7aa33aSEmmanuel VadotadditionalProperties: false
71*cb7aa33aSEmmanuel Vadot
72*cb7aa33aSEmmanuel Vadotexamples:
73*cb7aa33aSEmmanuel Vadot  - |
74*cb7aa33aSEmmanuel Vadot    #include <dt-bindings/interrupt-controller/arm-gic.h>
75*cb7aa33aSEmmanuel Vadot    #include <dt-bindings/clock/mt2712-clk.h>
76*cb7aa33aSEmmanuel Vadot    #include <dt-bindings/interrupt-controller/irq.h>
77*cb7aa33aSEmmanuel Vadot
78*cb7aa33aSEmmanuel Vadot    pwm0: pwm@11006000 {
79*cb7aa33aSEmmanuel Vadot        compatible = "mediatek,mt2712-pwm";
80*cb7aa33aSEmmanuel Vadot        reg = <0x11006000 0x1000>;
81*cb7aa33aSEmmanuel Vadot        #pwm-cells = <2>;
82*cb7aa33aSEmmanuel Vadot        interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
83*cb7aa33aSEmmanuel Vadot        clocks = <&topckgen CLK_TOP_PWM_SEL>, <&pericfg CLK_PERI_PWM>,
84*cb7aa33aSEmmanuel Vadot                 <&pericfg CLK_PERI_PWM0>, <&pericfg CLK_PERI_PWM1>,
85*cb7aa33aSEmmanuel Vadot                 <&pericfg CLK_PERI_PWM2>, <&pericfg CLK_PERI_PWM3>,
86*cb7aa33aSEmmanuel Vadot                 <&pericfg CLK_PERI_PWM4>, <&pericfg CLK_PERI_PWM5>,
87*cb7aa33aSEmmanuel Vadot                 <&pericfg CLK_PERI_PWM6>, <&pericfg CLK_PERI_PWM7>;
88*cb7aa33aSEmmanuel Vadot        clock-names = "top", "main",
89*cb7aa33aSEmmanuel Vadot                      "pwm1", "pwm2",
90*cb7aa33aSEmmanuel Vadot                      "pwm3", "pwm4",
91*cb7aa33aSEmmanuel Vadot                      "pwm5", "pwm6",
92*cb7aa33aSEmmanuel Vadot                      "pwm7", "pwm8";
93*cb7aa33aSEmmanuel Vadot    };
94