xref: /freebsd/sys/contrib/device-tree/Bindings/pwm/imx-tpm-pwm.yaml (revision ec0ea6efa1ad229d75c394c1a9b9cac33af2b1d3)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/imx-tpm-pwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX TPM PWM controller
8
9maintainers:
10  - Anson Huang <anson.huang@nxp.com>
11
12description: |
13  The TPM counter and period counter are shared between multiple
14  channels, so all channels should use same period setting.
15
16properties:
17  "#pwm-cells":
18    const: 3
19
20  compatible:
21    enum:
22      - fsl,imx7ulp-pwm
23
24  reg:
25    maxItems: 1
26
27  assigned-clocks:
28    maxItems: 1
29
30  assigned-clock-parents:
31    maxItems: 1
32
33  clocks:
34    maxItems: 1
35
36required:
37  - "#pwm-cells"
38  - compatible
39  - reg
40  - clocks
41
42additionalProperties: false
43
44examples:
45  - |
46    #include <dt-bindings/clock/imx7ulp-clock.h>
47
48    pwm@40250000 {
49        compatible = "fsl,imx7ulp-pwm";
50        reg = <0x40250000 0x1000>;
51        assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
52        assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
53        clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
54        #pwm-cells = <3>;
55    };
56