xref: /freebsd/sys/contrib/device-tree/Bindings/pwm/imx-tpm-pwm.yaml (revision b197d4b893974c9eb4d7b38704c6d5c486235d6f) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/imx-tpm-pwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX TPM PWM controller
8
9maintainers:
10  - Anson Huang <anson.huang@nxp.com>
11
12description: |
13  The TPM counter and period counter are shared between multiple
14  channels, so all channels should use same period setting.
15
16allOf:
17  - $ref: pwm.yaml#
18
19properties:
20  "#pwm-cells":
21    const: 3
22
23  compatible:
24    enum:
25      - fsl,imx7ulp-pwm
26
27  reg:
28    maxItems: 1
29
30  assigned-clocks:
31    maxItems: 1
32
33  assigned-clock-parents:
34    maxItems: 1
35
36  clocks:
37    maxItems: 1
38
39required:
40  - compatible
41  - reg
42  - clocks
43
44additionalProperties: false
45
46examples:
47  - |
48    #include <dt-bindings/clock/imx7ulp-clock.h>
49
50    pwm@40250000 {
51        compatible = "fsl,imx7ulp-pwm";
52        reg = <0x40250000 0x1000>;
53        assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
54        assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
55        clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
56        #pwm-cells = <3>;
57    };
58